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authorCosmin-Gabriel Samoila <cosmin.samoila@nxp.com>2018-10-15 15:18:09 +0300
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:34:41 +0800
commit40181a33c12defdf24dcfe1e4ce7746bce09700b (patch)
tree43126b3cbaad03ad453d9d84683c4c49fdcd29cf /arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi
parentb7971ed41fd9d230706062638e5262b4658e9b5a (diff)
MLK-19936-2 arch: arm64: fsl-imx8mm: add audio plls in micfil node
Parse the clock tree and stop when you find one of the audio_plls. If this audio_pll cannot support the required rate, change the parent to the other pll. Set rate to rate * 1024 so we can support all parameter configurations with a minimum clock rate. This is required to support all rates multiple of 11025 and 8000. Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com> Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi8
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi
index 140bc0ce439a..f3d201ed857d 100644
--- a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi
@@ -793,8 +793,12 @@
<GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MM_CLK_PDM_IPG>,
- <&clk IMX8MM_CLK_PDM_ROOT>;
- clock-names = "ipg_clk", "ipg_clk_app";
+ <&clk IMX8MM_CLK_PDM_ROOT>,
+ <&clk IMX8MM_AUDIO_PLL1_OUT>,
+ <&clk IMX8MM_AUDIO_PLL2_OUT>,
+ <&clk IMX8MM_CLK_EXT3>;
+ clock-names = "ipg_clk", "ipg_clk_app",
+ "pll8k", "pll11k", "clkext3";
dmas = <&sdma2 24 26 0x80000000>;
dma-names = "rx";
status = "disabled";