diff options
| author | Robby Cai <robby.cai@nxp.com> | 2018-05-23 21:10:58 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:31:57 +0800 |
| commit | 62ed96af44978f1b5545b2044b672a611517120c (patch) | |
| tree | d29bd1deb6e62bac8d34d21886bdbe8f395b4291 /arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi | |
| parent | 59e5fa6d4e8ad5c3d4fcd54aa8fa0a0d98e148b6 (diff) | |
MLK-18362-3 arm64: dts: add mipi csi camera support on imx8mm-evk
add node for MIPI CSI, CSI, and camera OV5640
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi')
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi index f483f0a9e0b0..28775fe176cc 100755 --- a/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8mm.dtsi @@ -166,6 +166,29 @@ }; }; + csi1_bridge: csi1_bridge@32e20000 { + compatible = "fsl,imx8mm-csi", "fsl,imx8mq-csi", "fsl,imx6s-csi"; + reg = <0x0 0x32e20000 0x0 0x10000>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_CSI1_ROOT>, + <&clk IMX8MM_CLK_DUMMY>; + clock-names = "disp-axi", "csi_mclk", "disp_dcic"; + status = "disabled"; + }; + + mipi_csi_1: mipi_csi@32e30000 { + compatible = "fsl,imx8mm-mipi-csi"; + reg = <0x0 0x32e30000 0x0 0x1000>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; + clock-frequency = <333000000>; + clocks = <&clk IMX8MM_CLK_CSI1_CORE_DIV>, + <&clk IMX8MM_CLK_CSI1_PHY_REF_DIV>; + clock-names = "mipi_clk", "phy_clk"; + bus-width = <4>; + status = "disabled"; + }; + mipi_pd: gpc_power_domain@0 { compatible = "fsl,imx8mm-pm-domain"; #power-domain-cells = <0>; |