diff options
| author | Philippe Schenker <philippe.schenker@toradex.com> | 2019-07-12 10:28:36 +0200 |
|---|---|---|
| committer | Philippe Schenker <philippe.schenker@toradex.com> | 2019-08-06 10:06:12 +0200 |
| commit | 45a9814f9fcb75ed01bce3a0f90813b459ec7a76 (patch) | |
| tree | ee854ced1b7ef09c34e64d9b183d367836cf94bb /arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi | |
| parent | de97de6ba7eb222a61fbefc671b996933e77caec (diff) | |
ARM64: dts: colibri-imx8x: Move entries from eval to SoM-level
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi | 59 |
1 files changed, 55 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi index ceb754eca674..1ce4a3d3386b 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi @@ -246,14 +246,22 @@ }; }; -/* On-module MIPI CSI I2C accessible via FFC (X3) */ +/* On-module MIPI DSI accessible on FFC (X2) */ +&i2c0_mipi_lvds0 { + #address-cells = <1>; + #size-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c0_mipi_lvds0>; + clock-frequency = <100000>; +}; + +/* On-module MIPI CSI accessible on FFC (X3) */ &i2c0_mipi_lvds1 { #address-cells = <1>; #size-cells = <0>; clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c0_mipi_csi>; - status = "disabled"; }; /* Colibri I2C */ @@ -684,7 +692,7 @@ >; }; - /* MIPI DSI0 I2C on FFC (X2) */ + /* On-module MIPI DSI I2C accessible on FFC (X2) */ pinctrl_i2c0_mipi_lvds0: mipi_lvds0_i2c0_grp { fsl,pins = < SC_P_MIPI_DSI0_I2C0_SCL_MIPI_DSI0_I2C0_SCL 0xc6000020 /* SODIMM 140 */ @@ -692,7 +700,7 @@ >; }; - /* On-module MIPI CSI I2C accessible via FFC (X3) */ + /* On-module MIPI CSI I2C accessible on FFC (X3) */ pinctrl_i2c0_mipi_csi: mipi_csi_i2c0_grp { fsl,pins = < SC_P_MIPI_DSI1_I2C0_SCL_MIPI_DSI1_I2C0_SCL 0xc6000020 /* SODIMM 186 */ @@ -734,6 +742,22 @@ status = "okay"; }; +&ldb1 { + status = "okay"; +}; + +&ldb1_phy { + status = "okay"; +}; + +&ldb2 { + status = "okay"; +}; + +&ldb2_phy { + status = "okay"; +}; + /* Colibri SPI */ &lpspi2 { #address-cells = <1>; @@ -774,6 +798,33 @@ status = "disabled"; }; +&mipi_dsi1 { + pwr-delay = <10>; + status = "disabled"; +}; + +&mipi_dsi_bridge1 { + status = "disabled"; +}; + +&mipi_dsi_phy1 { + status = "disabled"; +}; + +&mipi_dsi2 { + pwr-delay = <10>; + status = "disabled"; +}; + +&mipi_dsi_bridge2 { + status = "disabled"; +}; + +&mipi_dsi_phy2 { + status = "disabled"; +}; + + /* On-module PCIe for wifi */ &pcieb{ pinctrl-names = "default"; |