diff options
| author | Oleksandr Suvorov <oleksandr.suvorov@toradex.com> | 2019-09-17 14:53:01 +0300 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2019-09-20 10:36:49 +0200 |
| commit | fb527427e1f47e96d4de193646e31bdcf34f6460 (patch) | |
| tree | 360801a8b66f5e31a8368d3e24ffe788367d7c35 /arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi | |
| parent | ab73141be9d799c6bac71398f0fbd95a55d4fabe (diff) | |
ARM64: dts: colibri-imx8x: Add Atmel touchscreen
Add a setup for Atmel touchscreen controller to fully support
Toradex Capacitive Touch Display 7" Parallel and Capacitive Touch
Display 10.1" LVDS.
Related-to: #42580
Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi | 23 |
1 files changed, 20 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi index 2a48de0daf4b..564bf90583cb 100644 --- a/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-imx8qxp-colibri.dtsi @@ -243,12 +243,24 @@ clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; + + /* Atmel maxtouch controller */ + atmel_mxt_ts: atmel_mxt_ts@4a { + compatible = "atmel,maxtouch"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mxt_ts>; + reg = <0x4a>; + interrupt-parent = <&gpio3>; + interrupts = <20 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 107 */ + reset-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>; /* SODIMM 106 */ + status = "disabled"; + }; }; &iomuxc { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_hog0>, <&pinctrl_hog1>, <&pinctrl_hog2>, - <&pinctrl_ext_io0>; + <&pinctrl_ext_io0>, <&pinctrl_mxt_ts>; colibri-imx8qxp { /* On-module touch pen-down interrupt */ @@ -389,7 +401,6 @@ SC_P_SAI0_TXD_LSIO_GPIO0_IO25 0x20 /* SODIMM 103 */ SC_P_CSI_D01_CI_PI_D03 0x61 /* SODIMM 103 */ SC_P_QSPI0B_DATA1_LSIO_GPIO3_IO19 0x20 /* SODIMM 105 */ - SC_P_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x20 /* SODIMM 107 */ SC_P_USB_SS3_TC2_LSIO_GPIO4_IO05 0x20 /* SODIMM 127 */ SC_P_USB_SS3_TC3_LSIO_GPIO4_IO06 0x20 /* SODIMM 131 */ SC_P_USB_SS3_TC1_LSIO_GPIO4_IO04 0x20 /* SODIMM 133 */ @@ -398,7 +409,6 @@ SC_P_SAI1_RXFS_LSIO_GPIO0_IO31 0x20 /* SODIMM 100 */ SC_P_QSPI0B_DQS_LSIO_GPIO3_IO22 0x20 /* SODIMM 102 */ SC_P_QSPI0B_SS0_B_LSIO_GPIO3_IO23 0x20 /* SODIMM 104 */ - SC_P_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x20 /* SODIMM 106 */ >; }; @@ -720,6 +730,13 @@ SC_P_SCU_BOOT_MODE3_SCU_DSC_RTC_CLOCK_OUTPUT_32K 0x20 >; }; + + pinctrl_mxt_ts: mxt-ts { + fsl,pins = < + SC_P_QSPI0B_DATA2_LSIO_GPIO3_IO20 0x20 /* SODIMM 107 */ + SC_P_QSPI0B_SS1_B_LSIO_GPIO3_IO24 0x20 /* SODIMM 106 */ + >; + }; }; }; |