diff options
| author | Laurentiu Tudor <laurentiu.tudor@nxp.com> | 2018-05-03 18:05:43 +0300 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:38 +0800 |
| commit | 116860553f68f473fc17d73bee3e2afb9d6dcf97 (patch) | |
| tree | 74b35a361a9d7a021bc424cd346265d690e546e5 /arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | |
| parent | e5a139234734bc91fa034609ca61cb588e4fb546 (diff) | |
arm64: dts: ls104xa: set mask to drop TBU ID from StreamID
The StreamID entering the SMMU is actually a concatenation of the
SMMU TBU ID and the ICID configured in software.
Since the TBU ID is internal to the SoC and since we want that the
actual the ICID configured in software to enter the SMMU witout any
additional set bits, mask out the TBU ID bits and leave only the
relevant ICID bits to enter SMMU.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 6de043e7ec43..025f409d3c42 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -233,6 +233,7 @@ compatible = "arm,mmu-500"; reg = <0 0x9000000 0 0x400000>; dma-coherent; + stream-match-mask = <0x7f00>; #global-interrupts = <2>; #iommu-cells = <1>; interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, |