diff options
| author | Laurentiu Tudor <laurentiu.tudor@nxp.com> | 2018-07-24 13:11:03 +0300 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:41 +0800 |
| commit | ba183cc45d3713cdccb838998ed852797db52f6c (patch) | |
| tree | 5734752dd257fa53205cca5b99fc0ede8ba63719 /arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | |
| parent | b3dc531ee7612279b2921ec27237cf2c5106b418 (diff) | |
arm64: dts: ls104x: make dma-coherent global to the SoC
These SoCs are really completely dma coherent in their entirety so add
the dma-coherent property at the soc level in the device tree and drop
the instances where it's specifically added to a few select devices.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 418295e95094..058e3f348e96 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -191,6 +191,7 @@ #size-cells = <2>; ranges; dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>; + dma-coherent; ddr: memory-controller@1080000 { compatible = "fsl,qoriq-memory-controller"; |