diff options
| author | Florinel Iordache <florinel.iordache@nxp.com> | 2018-11-05 17:03:04 +0200 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:48 +0800 |
| commit | 59399b4e83156c359743082580c5ec1442ea9dd3 (patch) | |
| tree | 75462ffc14557304caaf1117630043863d5873ce /arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | |
| parent | 534cfce193bbaff52612007c9d1c387508a75496 (diff) | |
arm64: dts: lx2160: DPMAC connections to backplane PHYs example
This is an example of device tree nodes required to enable 10GBase-KR and 40GBase-KR on LX2160
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts index fed55d5c6c37..638e8e0d19f6 100644 --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts @@ -202,3 +202,23 @@ fsl,lane-reg = <0xE00 0x100>; /* lane G */ }; }; + +/* Update DPMAC connections to 40G backplane PHYs + * &dpmac1 { + * phy-handle = <&pcs_phy1>; + * }; + * + * &dpmac2 { + * phy-handle = <&pcs_phy2>; + * }; + */ + +/* Update DPMAC connections to 10G backplane PHYs + * &dpmac3 { + * phy-handle = <&pcs_phy3>; + * }; + * + * &dpmac4 { + * phy-handle = <&pcs_phy4>; + * }; + */ |