diff options
author | Liu Ying <victor.liu@nxp.com> | 2020-05-09 16:30:53 +0800 |
---|---|---|
committer | Liu Ying <victor.liu@nxp.com> | 2020-05-11 15:08:08 +0800 |
commit | d3707a22d96692146c7c0d2c661a6b1a992bd640 (patch) | |
tree | edc66be31103cadce535a687a263ca9763d80cb2 /arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi | |
parent | 5fdc2f53547a973a175ae3fdd93e197e89d1e17d (diff) |
MLK-23959 arm64: imx8-ss-dc0/1.dtsi: Correct dpu node interrupt properties
The dpu node 'interrupts' and 'interrupt-names' properties should
reflect all dpu interrupts including the missing 'reserved' interrupt.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Reviewed-by: Sandor Yu <Sandor.yu@nxp.com>
(cherry picked from commit c2b595f2d92b3239f0c494d83249d664245d3f10)
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi index 3702975f3d96..c05a3eb7f9e5 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-dc1.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright 2019 NXP + * Copyright 2019,2020 NXP */ dc1_subsys: bus@57000000 { @@ -411,10 +411,11 @@ dc1_subsys: bus@57000000 { <77>, <78>, <79>, <80>, <81>, <199>, <200>, <201>, <202>, <203>, <204>, <205>, - <206>, <207>, <208>, <0>, - <1>, <2>, <3>, <4>, - <82>, <83>, <84>, <85>, - <209>, <210>, <211>, <212>; + <206>, <207>, <208>, <5>, + <0>, <1>, <2>, <3>, + <4>, <82>, <83>, <84>, + <85>, <209>, <210>, <211>, + <212>; interrupt-names = "store9_shdload", "store9_framecomplete", "store9_seqcomplete", @@ -450,6 +451,7 @@ dc1_subsys: bus@57000000 { "sig1_shdload", "sig1_valid", "sig1_error", + "reserved", "cmdseq_error", "comctrl_sw0", "comctrl_sw1", |