diff options
author | Minjie Zhuang <minjie.zhuang@nxp.com> | 2019-09-06 16:32:27 +0800 |
---|---|---|
committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:07:35 +0800 |
commit | 4cefbf217d0bf6efa6ed4a67b3fc76374eaca292 (patch) | |
tree | 1e4e32814d7b5ba18bc7048467c94cd9d6af708d /arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi | |
parent | 596b29d461786e8fdb31b61cc98a12fe53ecb90d (diff) |
arm64: dts: imx8qm/imx8qxp: Add GPU devices for 8QM/8QXP
Add gpu in device tree:
arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi
arm64/boot/dts/freescale/imx8-ss-gpu1.dtsi
arm64/boot/dts/freescale/imx8qm-mek.dts
arm64/boot/dts/freescale/imx8qm-ss-gpu.dtsi
arm64/boot/dts/freescale/imx8qm.dtsi
arm64/boot/dts/freescale/imx8qxp-ss-gpu.dtsi
arm64/boot/dts/freescale/imx8qxp.dtsi
Signed-off-by: Minjie Zhuang <minjie.zhuang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi | 14 |
1 files changed, 4 insertions, 10 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi index 21ade5da3e39..28aeeecb1832 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi @@ -6,11 +6,13 @@ #include <dt-bindings/firmware/imx/rsrc.h> -gpu_subsys: bus@53100000 { +gpu0_subsys: bus@53100000 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; - ranges = <0x53100000 0x0 0x53100000 0x40000>; + ranges = <0x53100000 0x0 0x53100000 0x40000>, + <0x80000000 0x0 0x80000000 0x80000000>, + <0x0 0x0 0x0 0x10000000>; gpu_3d0: gpu@53100000 { compatible = "fsl,imx8-gpu"; @@ -25,12 +27,4 @@ gpu_subsys: bus@53100000 { power-domains = <&pd IMX_SC_R_GPU_0_PID0>; status = "disabled"; }; - - imx8_gpu_ss: imx8_gpu_ss { - compatible = "fsl,imx8qxp-gpu", "fsl,imx8-gpu-ss"; - cores = <&gpu_3d0>; - reg = <0x0 0x80000000 0x0 0x80000000>, <0x0 0x0 0x0 0x10000000>; - reg-names = "phys_baseaddr", "contiguous_mem"; - status = "disabled"; - }; }; |