diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2019-11-06 13:40:03 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:09:13 +0800 |
| commit | 321ad8ae90ff5fe04949cfa909e40e05e4ea11db (patch) | |
| tree | d6440fb59b0aaf40e42a2e5292fffbc0e3c1e306 /arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi | |
| parent | 288239489365b4c6485847edce76eadfbf1ef84d (diff) | |
arm64: dts: freescale: Add i.MX8DXP LPDDR4 validation board support
Add i.MX8DXP LPDDR4 validation board DT support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi index f7b2e3a042c9..0272c950e3e9 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-img.dtsi @@ -254,6 +254,19 @@ img_subsys: bus@58000000 { status = "disabled"; }; + gpio0_mipi_csi0: gpio@58222000 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; + reg = <0x0 0x58222000 0x0 0x1000>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&irqsteer_csi0>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + power-domains = <&pd IMX_SC_R_CSI_0>, <&pd IMX_SC_R_ISI_CH0>; + power-domain-names = "pd_csi", "pd_isi_ch0"; + }; + i2c_mipi_csi0: i2c@58226000 { compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x58226000 0x1000>; @@ -268,6 +281,19 @@ img_subsys: bus@58000000 { status = "disabled"; }; + gpio0_mipi_csi1: gpio@58242000 { + compatible = "fsl,imx8qm-gpio", "fsl,imx35-gpio"; + reg = <0x0 0x58242000 0x0 0x1000>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&irqsteer_csi1>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + power-domains = <&pd IMX_SC_R_CSI_1>, <&pd IMX_SC_R_ISI_CH0>; + power-domain-names = "pd_csi", "pd_isi_ch0"; + }; + i2c_mipi_csi1: i2c@58246000 { compatible = "fsl,imx8qxp-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x58246000 0x1000>; |