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authorDong Aisheng <aisheng.dong@nxp.com>2019-07-18 17:29:49 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 16:04:58 +0800
commit582cadd0727d944dc051c1ed9160558a3fb284b2 (patch)
treef388a7b55814aca5ef89e4a92e39c6ee35fe673e /arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
parentf9a192b4bfd814ee797a80e41730a18f36c9651f (diff)
arm64: dts: imx8: lsio: fix mu property
fix mu property Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
index 7eac43f1f655..b3e144fbfdbe 100644
--- a/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8-ss-lsio.dtsi
@@ -124,7 +124,7 @@ lsio_subsys: bus@5d000000 {
lsio_mu0: mailbox@5d1b0000 {
reg = <0x5d1b0000 0x10000>;
interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
- #mbox-cells = <0>;
+ #mbox-cells = <2>;
status = "disabled";
};
@@ -150,7 +150,7 @@ lsio_subsys: bus@5d000000 {
lsio_mu4: mailbox@5d1f0000 {
reg = <0x5d1f0000 0x10000>;
- interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>;
#mbox-cells = <2>;
status = "disabled";
};