diff options
author | Zhou Peng <eagle.zhou@nxp.com> | 2019-08-27 10:45:37 +0800 |
---|---|---|
committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:07:01 +0800 |
commit | b54433f21b34cff9a64673f414c6cbf389ecc8a5 (patch) | |
tree | e71580d7f2843b751533ba372b3dce173ac6731e /arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi | |
parent | f2a981c62f7a4ffcb6dec3f9f0a34fca8eb73973 (diff) |
arm64: dts: imx8qm: add vpu decoder and encoder
enable vpu decoder and encoder
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi')
-rwxr-xr-x[-rw-r--r--] | arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi index f289e15f15ea..74e2bf95b992 100644..100755 --- a/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-vpu.dtsi @@ -55,4 +55,12 @@ vpu_subsys: bus@2c000000 { fsl,vpu_ap_mu_id = <17>; status = "okay"; }; + + mu2_m0: mu2_m0@2d040000 { + compatible = "fsl,imx8-mu2-vpu-m0"; + reg = <0x2d040000 0x20000>; + interrupts = <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>; + fsl,vpu_ap_mu_id = <18>; + status = "disabled"; + }; }; |