diff options
| author | Silvano di Ninno <silvano.dininno@nxp.com> | 2020-02-21 16:12:34 +0100 |
|---|---|---|
| committer | Silvano di Ninno <silvano.dininno@nxp.com> | 2020-02-24 13:08:39 +0100 |
| commit | ad460e81a448fa3474b4b526938235f95e1458b7 (patch) | |
| tree | ed2d8428c3efd2d2a099bd604430c35e1c1ef677 /arch/arm64/boot/dts/freescale/imx8dx-mek.dts | |
| parent | 072173c9844b9ff82693dafc383e7a38971ac4f4 (diff) | |
TEE-502 arch: arm64: dts: imx8dxl:imx8dx:imx8mp reserved BL32 memory
BL32 base address is set within the first 1GByte of DDR.
As a new rule it will be set at base address + 0x16000000.
This new position will relax current dependency of the OPTEE
base address on the size of the DDR.
Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8dx-mek.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8dx-mek.dts | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8dx-mek.dts b/arch/arm64/boot/dts/freescale/imx8dx-mek.dts index c257279496fc..807d8cdc9a41 100644 --- a/arch/arm64/boot/dts/freescale/imx8dx-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8dx-mek.dts @@ -12,11 +12,19 @@ compatible = "fsl,imx8dx-mek", "fsl,imx8dx", "fsl,imx8qxp"; reserved-memory { +/* + * Memory reserved for optee usage. Please do not use. + * This will be automaticky added to dtb if OP-TEE is installed. + * optee@96000000 { + * reg = <0 0x96000000 0 0x2000000>; + * no-map; + * }; + */ linux,cma { compatible = "shared-dma-pool"; reusable; size = <0 0x14000000>; - alloc-ranges = <0 0x96000000 0 0x14000000>; + alloc-ranges = <0 0x98000000 0 0x14000000>; linux,cma-default; }; }; @@ -37,4 +45,4 @@ &imx8_gpu_ss { reg = <0x80000000 0x40000000>, <0x0 0x08000000>; reg-names = "phys_baseaddr", "contiguous_mem"; -};
\ No newline at end of file +}; |