diff options
| author | Joakim Zhang <qiangqing.zhang@nxp.com> | 2020-02-18 12:47:50 +0800 |
|---|---|---|
| committer | Joakim Zhang <qiangqing.zhang@nxp.com> | 2020-03-04 09:06:05 +0800 |
| commit | 0af50931db7ee110fe0f82052ac4b437120f7824 (patch) | |
| tree | 36ecd1719e0fa8df87442c08e9d653d3f1b5b2c2 /arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi | |
| parent | 5604fcd42940e560e44a3632cf7be2b29011d49b (diff) | |
MLK-23418-6 arch: arm64: dts: imx8dxl: add perf device node in DB
Add PMU device node in DB on i.MX8DXL EVK board.
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi index 4d52832b67c4..b2be8fa51ba8 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-ddr.dtsi @@ -8,3 +8,33 @@ compatible = "fsl,imx8dxl-ddr-pmu", "fsl,imx8-ddr-pmu"; interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; }; + +&ddr_subsys { + db_ipg_clk: clock-db-ipg { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <456000000>; + clock-output-names = "db_ipg_clk"; + }; + + db_pmu0: db-pmu@5ca40000 { + compatible = "fsl,imx8dxl-db-pmu"; + reg = <0x5ca40000 0x10000>; + interrupt-parent = <&gic>; + interrupts = <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&db_pmu0_lpcg 1>, <&db_pmu0_lpcg 0>; + clock-names = "ipg", "cnt"; + power-domains = <&pd IMX_SC_R_PERF>; + }; + + db_pmu0_lpcg: clock-controller@5cae0000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5cae0000 0x10000>; + #clock-cells = <1>; + clocks = <&db_ipg_clk>, <&db_ipg_clk>; + bit-offset = <0 16>; + clock-output-names = "perf_lpcg_cnt_clk", + "perf_lpcg_ipg_clk"; + power-domains = <&pd IMX_SC_R_PERF>; + }; +}; |