diff options
| author | Han Xu <han.xu@nxp.com> | 2019-06-05 22:42:55 -0500 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:04:31 +0800 |
| commit | f5fc8e4f9a1ab797c832f9976e1de094cd2a8bd5 (patch) | |
| tree | d773d8bf8e9ac579ccca10493107c6e60eb9b1e3 /arch/arm64/boot/dts/freescale/imx8mm-evk.dts | |
| parent | 6fac62a282c7d221be17c16f2abe7a93517477cb (diff) | |
MLK-21960-3: arm64: dts: enable fspi in imx8mm dts
enable fspi in imx8mm DT file
Signed-off-by: Han Xu <han.xu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mm-evk.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts index a0b47188d591..f02269c777db 100644 --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts @@ -183,6 +183,22 @@ status = "okay"; }; +&flexspi { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_flexspi0>; + status = "okay"; + + flash0: mt25qu256aba@0 { + reg = <0>; + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + spi-max-frequency = <80000000>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + }; +}; + &i2c1 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -356,6 +372,17 @@ >; }; + pinctrl_flexspi0: flexspi0grp { + fsl,pins = < + MX8MM_IOMUXC_NAND_ALE_QSPI_A_SCLK 0x1c2 + MX8MM_IOMUXC_NAND_CE0_B_QSPI_A_SS0_B 0x82 + MX8MM_IOMUXC_NAND_DATA00_QSPI_A_DATA0 0x82 + MX8MM_IOMUXC_NAND_DATA01_QSPI_A_DATA1 0x82 + MX8MM_IOMUXC_NAND_DATA02_QSPI_A_DATA2 0x82 + MX8MM_IOMUXC_NAND_DATA03_QSPI_A_DATA3 0x82 + >; + }; + pinctrl_gpio_led: gpioledgrp { fsl,pins = < MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 |