MLK-23954-1 arm64: dts: add i.MX8MN LPDDR4 EVK root/inmate dts

Add root/inmate dts.
They are almost same as i.MX8MN DDR4 jailhouse dts.

Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit 1bae6cf2bf632d238e0f977632975df428839a04)

1 files changed, 90 insertions, 0 deletions

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-evk-root.dts b/arch/arm64/boot/dts/freescale/imx8mn-evk-root.dts
new file mode 100644
index 000000000000..d0f8eaf92f34
--- /dev/null
+++ b/arch/arm64/boot/dts/freescale/imx8mn-evk-root.dts
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2020 NXP
+ */
+
+#include "imx8mn-evk.dts"
+
+&{/} {
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		linux,cma {
+			compatible = "shared-dma-pool";
+			reusable;
+			size = <0 0x28000000>;
+			alloc-ranges = <0 0x40000000 0 0x93c00000>;
+			linux,cma-default;
+		};
+
+		ivshmem_reserved: ivshmem@0xbbb00000 {
+			no-map;
+			reg = <0 0xbbb00000 0x0 0x00100000>;
+		};
+
+		ivshmem2_reserved: ivshmem2@0xbba00000 {
+			no-map;
+			reg = <0 0xbba00000 0x0 0x00100000>;
+		};
+
+		pci_reserved: pci@0xbb800000 {
+			no-map;
+			reg = <0 0xbb800000 0x0 0x00200000>;
+		};
+
+		loader_reserved: loader@0xbb700000 {
+			no-map;
+			reg = <0 0xbb700000 0x0 0x00100000>;
+		};
+
+		jh_reserved: jh@0xb7c00000 {
+			no-map;
+			reg = <0 0xb7c00000 0x0 0x00400000>;
+		};
+
+		/* 512MB */
+		inmate_reserved: inmate@0x93c00000 {
+			no-map;
+			reg = <0 0x93c00000 0x0 0x24000000>;
+		};
+	};
+};
+
+&iomuxc {
+	/*
+	 * Used for the 2nd Linux.
+	 * TODO: M4 may use these pins.
+	 */
+	imx8mn-evk {
+		pinctrl_uart4: uart4grp {
+			fsl,pins = <
+				MX8MN_IOMUXC_UART4_RXD_UART4_DCE_RX	0x140
+				MX8MN_IOMUXC_UART4_TXD_UART4_DCE_TX	0x140
+			>;
+		};
+	};
+};
+
+&clk {
+	init-on-array = <IMX8MN_CLK_NAND_USDHC_BUS
+			 IMX8MN_CLK_USDHC3_ROOT
+			 IMX8MN_CLK_UART4_ROOT>;
+};
+
+&uart2 {
+	pinctrl-0 = <&pinctrl_uart2>, <&pinctrl_uart4>;
+	assigned-clocks = <&clk IMX8MN_CLK_UART4>;
+	assigned-clock-parents = <&clk IMX8MN_CLK_24M>;
+};
+
+&usdhc3 {
+	status = "disabled";
+};
+
+&usdhc2 {
+	pinctrl-0 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-1 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
+	pinctrl-2 = <&pinctrl_usdhc3>, <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
+};