diff options
| author | Jacky Bai <ping.bai@nxp.com> | 2019-11-21 10:46:15 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:19 +0800 |
| commit | ca9229d41b0a3c5a7e773e9592b367506776f421 (patch) | |
| tree | 4cb6d72580ff88d7a55933f1b3f2b091cc86d563 /arch/arm64/boot/dts/freescale/imx8mn.dtsi | |
| parent | 69456b33fae47f34b59d49c4bbf5699e7e001df0 (diff) | |
LF-39 arm64: dts: imx8mn Add busfreq support for imx8mn
Add busfreq support for imx8mn.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mn.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mn.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi b/arch/arm64/boot/dts/freescale/imx8mn.dtsi index 3f668cd6de0e..b8dc1694e8ce 100644 --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi @@ -178,6 +178,21 @@ clock-output-names = "clk_ext4"; }; + busfreq { /* BUSFREQ */ + compatible = "fsl,imx_busfreq"; + clocks = <&clk IMX8MN_DRAM_PLL_OUT>, <&clk IMX8MN_CLK_DRAM_ALT>, + <&clk IMX8MN_CLK_DRAM_APB>, <&clk IMX8MN_CLK_DRAM_APB>, + <&clk IMX8MN_CLK_DRAM_CORE>, <&clk IMX8MN_CLK_DRAM_ALT_ROOT>, + <&clk IMX8MN_SYS_PLL1_40M>, <&clk IMX8MN_SYS_PLL1_100M>, + <&clk IMX8MN_SYS_PLL2_333M>, <&clk IMX8MN_CLK_NOC>, + <&clk IMX8MN_CLK_AHB>, <&clk IMX8MN_CLK_MAIN_AXI>, + <&clk IMX8MN_CLK_24M>, <&clk IMX8MN_SYS_PLL1_800M>; + clock-names = "dram_pll", "dram_alt_src", "dram_apb_src", "dram_apb_pre_div", + "dram_core", "dram_alt_root", "sys_pll1_40m", "sys_pll1_100m", + "sys_pll2_333m", "noc_div", "ahb_div", "main_axi_src", "osc_24m", + "sys_pll1_800m"; + }; + power-domains { compatible = "simple-bus"; |