diff options
| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2020-03-26 13:40:22 +0800 |
|---|---|---|
| committer | Shengjiu Wang <shengjiu.wang@nxp.com> | 2020-03-27 16:04:34 +0800 |
| commit | 2a588a0e21ad278afca39853d037b679e7472b1a (patch) | |
| tree | 92aa8d4cf3f72483335e3ec4434865d6e4041397 /arch/arm64/boot/dts/freescale/imx8mp.dtsi | |
| parent | e053e4917f03dd742e5f6e8db918a1851c3120b0 (diff) | |
MLK-23680-2: arm64: dts: imx8mp: update clocks for sdma2 & sdma3
There is hardware issue: TKT0535653
SDMA3 can't work without setting AUDIOMIX_CLKEN0[SDMA2] (bit-26) to 1
The workaround is:
As the reset state of AUDIOMIX_CLKEN0[SDMA2] is enabled,
we just need to keep it on as reset state, don't touch it
in kernel, then every thing is same as before.
So for sdma node, it only need to care about AHB and IPG clock,
the gate of AUDIOMIX_CLKEN0[SDMA2] is always enabled.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8mp.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi index 2f2a6be31313..266179d9904c 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi @@ -1350,8 +1350,8 @@ compatible = "fsl,imx8mp-sdma", "fsl,imx7d-sdma"; reg = <0x30e10000 0x10000>; interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT>, - <&audiomix_clk IMX8MP_CLK_AUDIOMIX_SDMA2_ROOT>; + clocks = <&clk IMX8MP_CLK_IPG_AUDIO_ROOT>, + <&clk IMX8MP_CLK_AUDIO_AHB>; clock-names = "ipg", "ahb"; #dma-cells = <3>; fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; |