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authorLi Jun <jun.li@nxp.com>2020-03-17 16:34:40 +0800
committerLi Jun <jun.li@nxp.com>2020-03-17 19:38:52 +0800
commit99983662730e710ebe42ba517671e4464d74b296 (patch)
tree582bbbe572a80479a4a20eef4fbfb1493850f6d9 /arch/arm64/boot/dts/freescale/imx8mp.dtsi
parentabb33607ededfca97a820f627123a51d2f0d4724 (diff)
MLK-23596-2 ARM64: dtsi: imx8mp: add soft-itp-sync property for usb
SOFITPSYNC If this bit is set to '0' operating in host mode, the core keeps the UTMI/ULPI PHY on the first port in a non-suspended state whenever there is a SuperSpeed port that is not in Rx.Detect, SS.Disable and U3. If this bit is set to '1' operating in host mode, the core keeps the UTMI/ULPI PHY on the first port in a non-suspended state whenever the other non-SuperSpeed ports are not in a suspended state. This feature is useful because it saves power by suspending UTMI/ULPI when SuperSpeed only is active, and it helps resolve when the PHY does not transmit a host resume unless it is placed in suspend state. This bit must be programmed as a part of initialization at power-on reset, and must not be dynamically changed afterwards. with this property specified, this bit is set to be 1. Reviewed-by: Peter Chen <peter.chen@nxp.com> Signed-off-by: Li Jun <jun.li@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp.dtsi')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
index 3a4930d9d136..18951b092372 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
@@ -1959,6 +1959,7 @@
xhci-no-64bit-support;
usb3-resume-missing-cas;
snps,dis-u2-freeclk-exists-quirk;
+ snps,soft-itp-sync;
snps,dis_u3_susphy_quirk;
status = "disabled";
};
@@ -2000,6 +2001,7 @@
xhci-no-64bit-support;
usb3-resume-missing-cas;
snps,dis-u2-freeclk-exists-quirk;
+ snps,soft-itp-sync;
snps,dis_u3_susphy_quirk;
status = "disabled";
};