diff options
| author | Li Jun <jun.li@nxp.com> | 2019-01-27 22:04:56 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:03:58 +0800 |
| commit | 9bef6e0c6125cd3ca30d3e7dfd6108893e0f82f2 (patch) | |
| tree | f1c1c65723bc24d09dde72d6beb90b6a38fcf010 /arch/arm64/boot/dts/freescale/imx8mq-evk.dts | |
| parent | 5c95116d034fc844900212fccda8e6f658d87da9 (diff) | |
ARM64: dts: imx8mq-evk: add typec port controller node
Add typec port controller node ptn5110, which is a standard
TCPCI interface with PD PHY, imx8mq-evk board equiped with
a typec connector which is DRP on power, with the usb port
dwc3_0 has dual role enabled, so typec can control the data
role of the otg port.
Signed-off-by: Li Jun <jun.li@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq-evk.dts')
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 41 |
1 files changed, 41 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts index d04e01f8b380..b36f0808e1e5 100755 --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts @@ -6,6 +6,7 @@ /dts-v1/; +#include <dt-bindings/usb/pd.h> #include "imx8mq.dtsi" / { @@ -239,6 +240,33 @@ }; }; }; + + ptn5110: tcpc@50 { + compatible = "nxp,ptn5110"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_typec>; + reg = <0x50>; + interrupt-parent = <&gpio3>; + interrupts = <3 8>; + + port { + typec_dr_sw: endpoint { + remote-endpoint = <&usb3_drd_sw>; + }; + }; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + try-power-role = "sink"; + source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; + sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM) + PDO_VAR(5000, 20000, 3000)>; + op-sink-microwatt = <15000000>; + self-powered; + }; + }; }; &pcie0 { @@ -276,7 +304,14 @@ hnp-disable; srp-disable; adp-disable; + usb-role-switch; status = "okay"; + + port { + usb3_drd_sw: endpoint { + remote-endpoint = <&typec_dr_sw>; + }; + }; }; &usb3_phy1 { @@ -402,6 +437,12 @@ >; }; + pinctrl_typec: typecgrp { + fsl,pins = < + MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3 0x17059 + >; + }; + pinctrl_uart1: uart1grp { fsl,pins = < MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX 0x49 |