diff options
| author | Zhou Peng <eagle.zhou@nxp.com> | 2019-01-28 13:16:11 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:03:55 +0800 |
| commit | 97717f1b49dacee12aeaeb57de7dd25c660ef481 (patch) | |
| tree | b841a4b9b583809abe01c4c5c5863d45368c35ec /arch/arm64/boot/dts/freescale/imx8mq.dtsi | |
| parent | 036d3dfa4067495653ef35c03e8d745f7f038b4b (diff) | |
arm64: dts: vpu: add hantro decoder
Add vpu in device tree:
arch/arm64/boot/dts/freescale/imx8mq-evk.dts
arch/arm64/boot/dts/freescale/imx8mq.dtsi
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mq.dtsi')
| -rwxr-xr-x[-rw-r--r--] | arch/arm64/boot/dts/freescale/imx8mq.dtsi | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index 55a3d1c4bdf0..5ba143b4846b 100644..100755 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -1106,5 +1106,21 @@ interrupt-parent = <&gic>; interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; }; + + vpu: vpu@38300000 { + compatible = "nxp,imx8mq-hantro"; + reg = <0x38300000 0x200000>; + reg-names = "regs_hantro"; + interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "irq_hantro_g1", "irq_hantro_g2"; + clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>, <&clk IMX8MQ_CLK_VPU_G2_ROOT>, <&clk IMX8MQ_CLK_VPU_DEC_ROOT>; + clock-names = "clk_hantro_g1", "clk_hantro_g2", "clk_hantro_bus"; + assigned-clocks = <&clk IMX8MQ_CLK_VPU_G1>, <&clk IMX8MQ_CLK_VPU_G2>, <&clk IMX8MQ_CLK_VPU_BUS>; + assigned-clock-parents = <&clk IMX8MQ_VPU_PLL_OUT>, <&clk IMX8MQ_VPU_PLL_OUT>, <&clk IMX8MQ_SYS1_PLL_800M>; + assigned-clock-rates = <600000000>, <600000000>, <800000000>; + power-domains = <&pgc_vpu>; + regulator-supply = <&sw1c_reg>; + status = "disabled"; + }; }; }; |