diff options
| author | Liu Ying <victor.liu@nxp.com> | 2019-11-14 16:10:09 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:10:05 +0800 |
| commit | a058412a5e8913abe0aa71670fbcf39ab9a1d1c0 (patch) | |
| tree | d3ceaa481a0fccaab026fce3a1c3e96821c39897 /arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi | |
| parent | 2ff0f55f2f399e3eaec860776b926c998f8bf366 (diff) | |
arm64: imx8qm-ss-lvds.dtsi: Add pwm_lvds0/1 support
This patch adds pwm_lvds0/1 support for
i.MX8QM LVDS subsystem device tree.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi index ff54354fbd4c..1fe9afa12e03 100644 --- a/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-lvds.dtsi @@ -150,6 +150,19 @@ }; }; + pwm_lvds0: pwm@56244000 { + compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm"; + reg = <0x56244000 0x1000>; + clocks = <&lvds0_pwm_lpcg 0>, + <&lvds0_pwm_lpcg 1>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX_SC_R_LVDS_0_PWM_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + power-domains = <&pd IMX_SC_R_LVDS_0_PWM_0>; + status = "disabled"; + }; + i2c1_lvds0: i2c@56247000 { compatible = "fsl,imx8qm-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x56247000 0x4000>; @@ -303,6 +316,19 @@ }; }; + pwm_lvds1: pwm@57244000 { + compatible = "fsl,imx8qm-pwm", "fsl,imx27-pwm"; + reg = <0x57244000 0x1000>; + clocks = <&lvds1_pwm_lpcg 0>, + <&lvds1_pwm_lpcg 1>; + clock-names = "per", "ipg"; + assigned-clocks = <&clk IMX_SC_R_LVDS_1_PWM_0 IMX_SC_PM_CLK_PER>; + assigned-clock-rates = <24000000>; + #pwm-cells = <2>; + power-domains = <&pd IMX_SC_R_LVDS_1_PWM_0>; + status = "disabled"; + }; + i2c1_lvds1: i2c@57247000 { compatible = "fsl,imx8qm-lpi2c", "fsl,imx7ulp-lpi2c"; reg = <0x57247000 0x4000>; |