diff options
| author | Anson Huang <Anson.Huang@nxp.com> | 2019-11-06 14:36:58 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:09:15 +0800 |
| commit | 5553d3dcf5154dcb1791c7f44d3b206f946cced5 (patch) | |
| tree | 01b558513ae71541b6cd52a7ba2390650c66032c /arch/arm64/boot/dts/freescale/imx8qp.dtsi | |
| parent | 5b12c6cd171f16dfabcc6355d7299b12fdc8f43a (diff) | |
arm64: dts: freescale: Add i.MX8QP LPDDR4 validation board support
Add i.MX8QP LPDDR4 validation board DT support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qp.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qp.dtsi | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qp.dtsi b/arch/arm64/boot/dts/freescale/imx8qp.dtsi new file mode 100644 index 000000000000..ab657da22882 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8qp.dtsi @@ -0,0 +1,47 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright 2019 NXP + */ + +#include "imx8qm.dtsi" + +/ { + model = "Freescale i.MX8QP"; + compatible = "fsl,imx8qp", "fsl,imx8qm"; +}; + +&cpus { + cpu-map { + cluster1 { + /delete-node/ core1; + }; + }; + /delete-node/ cpu@101; +}; + +&gpu_3d0 { + assigned-clock-rates = <625000000>, <625000000>; +}; + +&gpu_3d1 { + assigned-clock-rates = <625000000>, <625000000>; +}; + +&imx8_gpu_ss {/*<freq-kHz vol-uV>*/ + operating-points = < + /*nominal*/ 625000 0 + 625000 0 +/*underdrive*/ 400000 0 /*core/shader clock share the same frequency on underdrive mode*/ + >; +}; + +&thermal_zones { + cpu-thermal1 { + cooling-maps { + map0 { + cooling-device = + <&A72_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; + }; +}; |