diff options
| author | Dong Aisheng <aisheng.dong@nxp.com> | 2019-07-19 15:38:54 +0800 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:05:09 +0800 |
| commit | c637f0d66aa1fa8b534f9081a88a2bdbee1d5777 (patch) | |
| tree | 651edc1f4ac6a226dc4abe3d6957596e10a65fec /arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts | |
| parent | 0a0add4eb99143fe22b247a4c5a84ed42e9be30f (diff) | |
arm64: dts: imx8qxp-mek-dsp: convert to new clock binding
convert to new clock binding
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts | 46 |
1 files changed, 23 insertions, 23 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts index 859fbb63c544..b3ab7426932d 100644 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek-dsp.dts @@ -24,7 +24,7 @@ model = "dsp-audio"; cpu-dai = <&dspaudio>; audio-codec = <&cs42888>; - audio-platform = <&adma_dsp>; + audio-platform = <&dsp>; }; }; @@ -57,26 +57,26 @@ status = "okay"; }; -&adma_dsp { +&dsp { compatible = "fsl,imx8qxp-dsp"; reserved-region = <&dsp_reserved>; reg = <0x596e8000 0x88000>; - clocks = <&adma_lpcg IMX_ADMA_LPCG_ESAI_0_IPG_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_ESAI_0_EXTAL_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_ASRC_0_IPG_CLK>, - <&clk IMX_CLK_DUMMY>, - <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK0_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK1_CLK>, - <&adma_acm IMX_ADMA_ACM_AUD_CLK0_SEL>, - <&adma_acm IMX_ADMA_ACM_AUD_CLK1_SEL>; + clocks = <&esai0_lpcg 1>, + <&esai0_lpcg 0>, + <&asrc0_lpcg 0>, + <&clk_dummy>, + <&aud_pll_div0_lpcg 0>, + <&aud_pll_div1_lpcg 0>, + <&acm IMX_ADMA_ACM_AUD_CLK0_SEL>, + <&acm IMX_ADMA_ACM_AUD_CLK1_SEL>; clock-names = "esai_ipg", "esai_mclk", "asrc_ipg", "asrc_mem", "asrck_0", "asrck_1", "asrck_2", "asrck_3"; - assigned-clocks = <&adma_acm IMX_ADMA_ACM_ESAI0_MCLK_SEL>, - <&clk IMX_ADMA_AUD_PLL0>, - <&clk IMX_ADMA_AUD_PLL_DIV_CLK0_CLK>, - <&clk IMX_ADMA_AUD_REC_CLK0_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_ESAI_0_EXTAL_CLK>; - assigned-clock-parents = <&adma_lpcg IMX_ADMA_LPCG_AUD_PLL_DIV_CLK0_CLK>; + assigned-clocks = <&acm IMX_ADMA_ACM_ESAI0_MCLK_SEL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MISC0>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MISC1>, + <&esai0_lpcg 0>; + assigned-clock-parents = <&aud_pll_div0_lpcg 0>; assigned-clock-rates = <0>, <786432000>, <49152000>, <12288000>, <49152000>; fsl,dsp-firmware = "imx/dsp/hifi4.bin"; power-domains = <&pd IMX_SC_R_MU_13A>, @@ -100,15 +100,15 @@ <&pd IMX_SC_R_DMA_0_CH5>; }; -&adma_esai0 { +&esai0 { status = "disabled"; }; -&adma_asrc0 { +&asrc0 { status = "disabled"; }; -&adma_sai1 { +&sai1 { status = "disabled"; }; @@ -117,9 +117,9 @@ }; &cs42888 { - assigned-clocks = <&clk IMX_ADMA_AUD_PLL0>, - <&clk IMX_ADMA_AUD_PLL_DIV_CLK0_CLK>, - <&clk IMX_ADMA_AUD_REC_CLK0_CLK>, - <&adma_lpcg IMX_ADMA_LPCG_MCLKOUT0>; + assigned-clocks = <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_PLL>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_SLV_BUS>, + <&clk IMX_SC_R_AUDIO_PLL_0 IMX_SC_PM_CLK_MST_BUS>, + <&mclkout0_lpcg 0>; assigned-clock-rates = <786432000>, <49152000>, <12288000>, <12288000>; }; |