diff options
| author | Liu Ying <victor.liu@nxp.com> | 2019-08-20 06:16:14 -0400 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:06:36 +0800 |
| commit | b01b2afe4cf1110a919b97d4cb6f7653b4be3a87 (patch) | |
| tree | 88b34ab00c1d3dc42d9ce8ba61042590daa03a37 /arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | |
| parent | 64e2e5af16566849b261ab80374fa1c2c7a177bc (diff) | |
arm64: dts: imx8qxp-mek: Enable dc0_prg1/2 and dc0_dpr1_channel1/2
This patch enables dc0_prg1/2 and dc0_dpr1_channel1/2 for
DC0 subsystems of imx8qxp mek platform.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8qxp-mek.dts')
| -rwxr-xr-x | arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts index ffd525b55c4f..289371c23bac 100755 --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts @@ -299,6 +299,23 @@ status = "okay"; }; +&dc0_prg1 { + status = "okay"; +}; + +&dc0_prg2 { + status = "okay"; + +}; + +&dc0_dpr1_channel1 { + status = "okay"; +}; + +&dc0_dpr1_channel2 { + status = "okay"; +}; + &dpu1 { status = "okay"; }; |