diff options
| author | Leonard Crestez <leonard.crestez@nxp.com> | 2019-11-07 17:43:46 +0200 |
|---|---|---|
| committer | Dong Aisheng <aisheng.dong@nxp.com> | 2019-11-25 16:11:43 +0800 |
| commit | ac3b17423509b1d1032557d19d87947eb5876a5a (patch) | |
| tree | 045efc0632403391def6760de2024688bab6f50f /arch/arm64/boot/dts/freescale/s32v234-sbc.dts | |
| parent | f7d6827909e1b33d7ee7cdd26eb2b6307b6ac9e1 (diff) | |
arm64: dts: Initial s32v234-sbc support
Only enable uart and sdhc so currently identical to evb board.
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
Diffstat (limited to 'arch/arm64/boot/dts/freescale/s32v234-sbc.dts')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/s32v234-sbc.dts | 94 |
1 files changed, 94 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/freescale/s32v234-sbc.dts b/arch/arm64/boot/dts/freescale/s32v234-sbc.dts new file mode 100644 index 000000000000..1a306892a758 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/s32v234-sbc.dts @@ -0,0 +1,94 @@ +/* + * Copyright 2015-2016 Freescale Semiconductor, Inc. + * Copyright 2017 MicroSys Electronics GmbH + * Copyright 2018-2019 NXP + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +/dts-v1/; + +#include "s32v234.dtsi" + +/ { + model = "Freescale S32V234"; + compatible = "fsl,s32v234-sbc", "fsl,s32v234"; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&siul2 { + status = "okay"; + + s32v234-sbc { + /* Format of pins: MSCR_IDX PAD_CONFIGURATION If you know the + * IMCR_IDX instead of MSCR_IDX, add 512 to it as the Reference + * Manual states. + */ + + pinctrl_uart0: uart0grp { + fsl,pins = < + 12 PAD_CTL_UART_TX + 11 PAD_CTL_UART_RX_MSCR + 712 PAD_CTL_UART_RX_IMCR + >; + }; + + pinctrl_uart1: uart1grp { + fsl,pins = < + 14 PAD_CTL_UART_TX + 13 PAD_CTL_UART_RX_MSCR + 714 PAD_CTL_UART_RX_IMCR + >; + }; + + pinctrl_usdhc0: usdhc0grp { + fsl,pins = < + 150 PAD_CTL_USDHC_CLK + 902 PAD_CTL_MUX_MODE_ALT3 + 151 PAD_CTL_USDHC_CMD + 901 PAD_CTL_MUX_MODE_ALT3 + 152 PAD_CTL_USDHC_DAT0_3 + 903 PAD_CTL_MUX_MODE_ALT3 + 153 PAD_CTL_USDHC_DAT0_3 + 904 PAD_CTL_MUX_MODE_ALT3 + 154 PAD_CTL_USDHC_DAT0_3 + 905 PAD_CTL_MUX_MODE_ALT3 + 155 PAD_CTL_USDHC_DAT0_3 + 906 PAD_CTL_MUX_MODE_ALT3 + 159 PAD_CTL_USDHC_DAT4_7 + 907 PAD_CTL_MUX_MODE_ALT3 + 160 PAD_CTL_USDHC_DAT4_7 + 908 PAD_CTL_MUX_MODE_ALT3 + 161 PAD_CTL_USDHC_DAT4_7 + 909 PAD_CTL_MUX_MODE_ALT3 + 162 PAD_CTL_USDHC_DAT4_7 + 910 PAD_CTL_MUX_MODE_ALT3 + >; + }; + }; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart0>; + status = "okay"; +}; + +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uart1>; + status = "okay"; +}; + +&usdhc0 { + no-1-8-v; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc0>; + status = "okay"; +}; |