diff options
| author | Bibby Hsieh <bibby.hsieh@mediatek.com> | 2016-08-04 10:57:18 +0800 |
|---|---|---|
| committer | Matthias Brugger <matthias.bgg@gmail.com> | 2017-01-13 16:31:33 +0100 |
| commit | fc6634ac0e5380aeb1063275a2e9a583d41b2306 (patch) | |
| tree | 1ad120ffb13f7903b7cb4e815728515f6fd74fb3 /arch/arm64/boot/dts/mediatek | |
| parent | 7ce7d89f48834cefece7804d38fc5d85382edf77 (diff) | |
arm64: dts: mt8173: add mmsel clocks for 4K support
To support HDMI 4K resolution, mmsys need clcok
mm_sel to be 400MHz.
The board .dts file should override the clock rate
property with the higher VENCPLL frequency the board
supports HDMI 4K resolution.
Signed-off-by: Bibby Hsieh <bibby.hsieh@mediatek.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Diffstat (limited to 'arch/arm64/boot/dts/mediatek')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8173.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index 12e702771f5c..3bb20e0a81f2 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -778,6 +778,8 @@ compatible = "mediatek,mt8173-mmsys", "syscon"; reg = <0 0x14000000 0 0x1000>; power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>; + assigned-clocks = <&topckgen CLK_TOP_MM_SEL>; + assigned-clock-rates = <400000000>; #clock-cells = <1>; }; |