diff options
author | Robert Chiras <robert.chiras@nxp.com> | 2021-07-09 17:08:33 +0300 |
---|---|---|
committer | Philippe Schenker <philippe.schenker@toradex.com> | 2022-05-18 16:48:05 +0200 |
commit | 6625f614a921fe9a32a817d84b43c2f426bc8367 (patch) | |
tree | 42fe3dc95c21228e622df5f1d8ca92e485cd779f /drivers/clk/imx/clk-imx8qxp.c | |
parent | c58325ef21a0e1581da3916378b78da248d603b4 (diff) |
LF-4020: clk: imx8qxp: Fix elcdif_pll clock
Move the elcdif_pll clock initialization before the lcd_clk, since the
elcdif_clk needs to be initialized ahead of lcd_clk, being its parent.
This change fixes issues with the LCD clocks during suspend/resume.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
Suggested-by: Ranjani Vaidyanathan <ranjani.vaidyanathan@nxp.com>
Acked-by: Laurentiu Palcu <laurentiu.palcu@nxp.com>
(cherry picked from commit 0668a88908ccc841081b0509d80e0b4f6b5f9a78)
Diffstat (limited to 'drivers/clk/imx/clk-imx8qxp.c')
-rw-r--r-- | drivers/clk/imx/clk-imx8qxp.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index c49c167a23ab..7fb34c2a803e 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -147,10 +147,10 @@ static int imx8qxp_clk_probe(struct platform_device *pdev) imx_clk_scu("ftm1_clk", IMX_SC_R_FTM_1, IMX_SC_PM_CLK_PER); imx_clk_scu("adc0_clk", IMX_SC_R_ADC_0, IMX_SC_PM_CLK_PER); imx_clk_scu("pwm_clk", IMX_SC_R_LCD_0_PWM_0, IMX_SC_PM_CLK_PER); + imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL); imx_clk_scu2("lcd_clk", lcd_sels, ARRAY_SIZE(lcd_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_PER); imx_clk_scu2("lcd_pxl_clk", lcd_pxl_sels, ARRAY_SIZE(lcd_pxl_sels), IMX_SC_R_LCD_0, IMX_SC_PM_CLK_MISC0); imx_clk_scu("lcd_pxl_bypass_div_clk", IMX_SC_R_LCD_0, IMX_SC_PM_CLK_BYPASS); - imx_clk_scu("elcdif_pll", IMX_SC_R_ELCDIF_PLL, IMX_SC_PM_CLK_PLL); /* Audio SS */ |