MLK-15284-3: mtd: nand: gpmi-nand: support NAND on i.MX8QXP

Enable the NAND support on i.MX8QXP

Signed-off-by: Han Xu <han.xu@nxp.com>

4 files changed, 35 insertions, 12 deletions

diff --git a/drivers/mtd/nand/gpmi-nand/bch-regs.h b/drivers/mtd/nand/gpmi-nand/bch-regs.h
index a84d72b2f61a..bebe633d191c 100644
--- a/drivers/mtd/nand/gpmi-nand/bch-regs.h
+++ b/drivers/mtd/nand/gpmi-nand/bch-regs.h
@@ -60,7 +60,7 @@
 #define MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0		11
 #define MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0	(0x1f << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)
 #define BF_BCH_FLASH0LAYOUT0_ECC0(v, x)				\
-	((GPMI_IS_MX6(x) || GPMI_IS_MX7(x))				\
+	((GPMI_IS_MX6(x) || GPMI_IS_MX7(x) || GPMI_IS_MX8(x))	\
 		? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT0_ECC0)	\
 			& MX6Q_BM_BCH_FLASH0LAYOUT0_ECC0)	\
 		: (((v) << BP_BCH_FLASH0LAYOUT0_ECC0)		\
@@ -71,7 +71,7 @@
 #define MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14			\
 				(0x1 << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14)
 #define BF_BCH_FLASH0LAYOUT0_GF(v, x)				\
-	(((GPMI_IS_MX6(x) || GPMI_IS_MX7(x)) && ((v) == 14))\
+	(((GPMI_IS_MX6(x) || GPMI_IS_MX7(x) || GPMI_IS_MX8(x)) && ((v) == 14))\
 		? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT0_GF_13_14)	\
 			& MX6Q_BM_BCH_FLASH0LAYOUT0_GF_13_14)	\
 		: 0						\
@@ -83,7 +83,7 @@
 #define MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE	\
 			(0x3ff << BP_BCH_FLASH0LAYOUT0_DATA0_SIZE)
 #define BF_BCH_FLASH0LAYOUT0_DATA0_SIZE(v, x)				\
-	((GPMI_IS_MX6(x) || GPMI_IS_MX7(x))	\
+	((GPMI_IS_MX6(x) || GPMI_IS_MX7(x) || GPMI_IS_MX8(x))	\
 		? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)	\
 		: ((v) & BM_BCH_FLASH0LAYOUT0_DATA0_SIZE)		\
 	)
@@ -102,7 +102,7 @@
 #define MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN		11
 #define MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN	(0x1f << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)
 #define BF_BCH_FLASH0LAYOUT1_ECCN(v, x)				\
-	((GPMI_IS_MX6(x) || GPMI_IS_MX7(x))				\
+	((GPMI_IS_MX6(x) || GPMI_IS_MX7(x) || GPMI_IS_MX8(x))	\
 		? (((v) << MX6Q_BP_BCH_FLASH0LAYOUT1_ECCN)	\
 			& MX6Q_BM_BCH_FLASH0LAYOUT1_ECCN)	\
 		: (((v) << BP_BCH_FLASH0LAYOUT1_ECCN)		\
@@ -113,7 +113,7 @@
 #define MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14			\
 				(0x1 << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14)
 #define BF_BCH_FLASH0LAYOUT1_GF(v, x)				\
-	(((GPMI_IS_MX6(x) || GPMI_IS_MX7(x)) && ((v) == 14))\
+	(((GPMI_IS_MX6(x) || GPMI_IS_MX7(x) || GPMI_IS_MX8(x)) && ((v) == 14))\
 		? (((1) << MX6Q_BP_BCH_FLASH0LAYOUT1_GF_13_14)	\
 			& MX6Q_BM_BCH_FLASH0LAYOUT1_GF_13_14)	\
 		: 0						\
@@ -125,7 +125,7 @@
 #define MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE	\
 			(0x3ff << BP_BCH_FLASH0LAYOUT1_DATAN_SIZE)
 #define BF_BCH_FLASH0LAYOUT1_DATAN_SIZE(v, x)				\
-	((GPMI_IS_MX6(x) || GPMI_IS_MX7(x))	\
+	((GPMI_IS_MX6(x) || GPMI_IS_MX7(x) || GPMI_IS_MX8(x))	\
 		? (((v) >> 2) & MX6Q_BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)	\
 		: ((v) & BM_BCH_FLASH0LAYOUT1_DATAN_SIZE)		\
 	)
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
index 2b927839ee05..56793865b468 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-lib.c
@@ -1024,6 +1024,7 @@ int gpmi_extra_init(struct gpmi_nand_data *this)
 	struct nand_chip *chip = &this->nand;
 
 	/* Enable the asynchronous EDO feature. */
+	/* if ((GPMI_IS_MX6(this) || GPMI_IS_MX7(this) || GPMI_IS_MX8(this)) */
 	if ((GPMI_IS_MX6(this) || GPMI_IS_MX7(this))
 			&& chip->onfi_version) {
 		int mode = onfi_get_async_timing_mode(chip);
@@ -1149,12 +1150,12 @@ int gpmi_is_ready(struct gpmi_nand_data *this, unsigned chip)
 		mask = MX23_BM_GPMI_DEBUG_READY0 << chip;
 		reg = readl(r->gpmi_regs + HW_GPMI_DEBUG);
 	} else if (GPMI_IS_MX28(this) || GPMI_IS_MX6(this) ||
-			GPMI_IS_MX7(this)) {
+			GPMI_IS_MX7(this) || GPMI_IS_MX8(this)) {
 		/*
 		 * In the imx6, all the ready/busy pins are bound
 		 * together. So we only need to check chip 0.
 		 */
-		if (GPMI_IS_MX6(this) || GPMI_IS_MX7(this))
+		if (GPMI_IS_MX6(this) || GPMI_IS_MX7(this) || GPMI_IS_MX8(this))
 			chip = 0;
 
 		/* MX28 shares the same R/B register as MX6Q. */
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
index 805f2754b9d6..30f1f0454a35 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.c
@@ -138,6 +138,12 @@ static const struct gpmi_devdata gpmi_devdata_imx6ull = {
 	.max_chain_delay = 12,
 };
 
+static const struct gpmi_devdata gpmi_devdata_imx8qxp = {
+	.type = IS_MX8QXP,
+	.bch_max_ecc_strength = 62,
+	.max_chain_delay = 12,
+};
+
 static irqreturn_t bch_irq(int irq, void *cookie)
 {
 	struct gpmi_nand_data *this = cookie;
@@ -783,6 +789,9 @@ static int acquire_dma_channels(struct gpmi_nand_data *this)
 {
 	struct platform_device *pdev = this->pdev;
 	struct dma_chan *dma_chan;
+	struct device_node *np = pdev->dev.of_node;
+
+	of_dma_configure(&pdev->dev, np);
 
 	/* request dma channel */
 	dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx");
@@ -807,6 +816,10 @@ static char *extra_clks_for_mx7d[GPMI_CLK_MAX] = {
 	"gpmi_bch_apb",
 };
 
+static char *extra_clks_for_mx8qxp[GPMI_CLK_MAX] = {
+	"gpmi_apb", "gpmi_bch", "gpmi_apb_bch",
+};
+
 static int gpmi_get_clks(struct gpmi_nand_data *this)
 {
 	struct resources *r = &this->resources;
@@ -826,6 +839,9 @@ static int gpmi_get_clks(struct gpmi_nand_data *this)
 		extra_clks = extra_clks_for_mx6q;
 	if (GPMI_IS_MX7(this))
 		extra_clks = extra_clks_for_mx7d;
+	if (GPMI_IS_MX8(this))
+		extra_clks = extra_clks_for_mx8qxp;
+
 	if (!extra_clks)
 		return 0;
 
@@ -842,7 +858,7 @@ static int gpmi_get_clks(struct gpmi_nand_data *this)
 		r->clock[i] = clk;
 	}
 
-	if (GPMI_IS_MX6(this) || GPMI_IS_MX7(this))
+	if (GPMI_IS_MX6(this) || GPMI_IS_MX7(this) || GPMI_IS_MX8(this))
 		/*
 		 * Set the default value for the gpmi clock.
 		 *
@@ -1484,7 +1500,7 @@ static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
 
 	/* set chunk0 size if meta size is 0 */
 	if (!meta) {
-		if (GPMI_IS_MX6(this) || GPMI_IS_MX7(this))
+		if (GPMI_IS_MX6(this) || GPMI_IS_MX7(this) || GPMI_IS_MX8(this))
 			r1_new &= ~MX6Q_BM_BCH_FLASH0LAYOUT0_DATA0_SIZE;
 		else
 			r1_new &= ~BM_BCH_FLASH0LAYOUT0_DATA0_SIZE;
@@ -2258,7 +2274,7 @@ static int gpmi_init_last(struct gpmi_nand_data *this)
 	 *  (1) the chip is imx6, and
 	 *  (2) the size of the ECC parity is byte aligned.
 	 */
-	if ((GPMI_IS_MX6(this) || GPMI_IS_MX7(this)) &&
+	if ((GPMI_IS_MX6(this) || GPMI_IS_MX7(this) || GPMI_IS_MX8(this)) &&
 		((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) {
 		ecc->read_subpage = gpmi_ecc_read_subpage;
 		chip->options |= NAND_SUBPAGE_READ;
@@ -2315,7 +2331,7 @@ static int gpmi_nand_init(struct gpmi_nand_data *this)
 		goto err_out;
 
 	ret = nand_scan_ident(mtd, GPMI_IS_MX6(this) || GPMI_IS_MX7(this)\
-				? 2 : 1, NULL);
+			      || GPMI_IS_MX8(this) ? 2 : 1, NULL);
 	if (ret)
 		goto err_out;
 
@@ -2386,6 +2402,9 @@ static const struct of_device_id gpmi_nand_id_table[] = {
 	}, {
 		.compatible = "fsl,imx6ull-gpmi-nand",
 		.data = (void *)&gpmi_devdata_imx6ull,
+	}, {
+		.compatible = "fsl,imx8qxp-gpmi-nand",
+		.data = (void *)&gpmi_devdata_imx8qxp,
 	}, { /* sentinel */ }
 };
 MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
diff --git a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
index 63243bcab1eb..f92616b99871 100644
--- a/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
+++ b/drivers/mtd/nand/gpmi-nand/gpmi-nand.h
@@ -132,6 +132,7 @@ enum gpmi_type {
 	IS_MX7D,
 	IS_MX6UL,
 	IS_MX6ULL,
+	IS_MX8QXP,
 };
 
 struct gpmi_devdata {
@@ -321,8 +322,10 @@ void gpmi_copy_bits(u8 *dst, size_t dst_bit_off,
 #define GPMI_IS_MX7D(x)		((x)->devdata->type == IS_MX7D)
 #define GPMI_IS_MX6UL(x)	((x)->devdata->type == IS_MX6UL)
 #define GPMI_IS_MX6ULL(x)	((x)->devdata->type == IS_MX6ULL)
+#define GPMI_IS_MX8QXP(x)	((x)->devdata->type == IS_MX8QXP)
 
 #define GPMI_IS_MX6(x)		(GPMI_IS_MX6Q(x) || GPMI_IS_MX6QP(x)\
 	   || GPMI_IS_MX6SX(x) || GPMI_IS_MX6UL(x) || GPMI_IS_MX6ULL(x))
 #define GPMI_IS_MX7(x)		(GPMI_IS_MX7D(x))
+#define GPMI_IS_MX8(x)		(GPMI_IS_MX8QXP(x))
 #endif