diff options
| author | Richard Zhu <hongxing.zhu@nxp.com> | 2020-05-08 14:09:02 +0800 |
|---|---|---|
| committer | Richard Zhu <hongxing.zhu@nxp.com> | 2020-05-14 11:31:16 +0800 |
| commit | af235be4424b003b2adc53c39f57f8ed00b0e342 (patch) | |
| tree | 7a4166e697c86c21e700681edd36f9c85a178984 /drivers/pci/controller/dwc/pci-imx6.c | |
| parent | 0735da29ed030b5449e3aaf22ddca7df1fabc8df (diff) | |
MLK-24008 PCI: imx: refine the codes to do compliance tests
- Don't limit to only PCIe GEN1 when do the compliance tests.
- Configure the TX drive level of iMX865 PHY, adjust the peak output
voltage to pass the PCIe GEN1 compliance tests.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Diffstat (limited to 'drivers/pci/controller/dwc/pci-imx6.c')
| -rw-r--r-- | drivers/pci/controller/dwc/pci-imx6.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 0229128c77c3..c655d9de144e 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1767,10 +1767,12 @@ static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie) * started in Gen2 mode, there is a possibility the devices on the * bus will not be detected at all. This happens with PCIe switches. */ - tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCR); - tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK; - tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1; - dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp); + if (!IS_ENABLED(CONFIG_PCI_IMX6_COMPLIANCE_TEST)) { + tmp = dw_pcie_readl_dbi(pci, PCIE_RC_LCR); + tmp &= ~PCIE_RC_LCR_MAX_LINK_SPEEDS_MASK; + tmp |= PCIE_RC_LCR_MAX_LINK_SPEEDS_GEN1; + dw_pcie_writel_dbi(pci, PCIE_RC_LCR, tmp); + } /* Start LTSSM. */ imx6_pcie_ltssm_enable(dev); |