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authorShengjiu Wang <shengjiu.wang@freescale.com>2017-07-12 18:19:25 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 15:53:46 +0800
commitf4a5a728876b3ba4fd4dc74de1f3dc9dc000077f (patch)
tree988b90fb2a9d1a13b2f1b3dd7a35ff8412af42b3 /sound/soc/fsl/fsl_sai.c
parent90efe83b6e9cc0b77fd9f117035fdfcf46b29dc2 (diff)
MLK-15960-1: ASoC: fsl_sai: update fifo_depth for different platform
The fifo_depth is changed to 64 in imx8qm/imx8qxp, in imx8mq, the fifo_depth is 128. which is mentioned in their ADD. Signed-off-by: Shengjiu Wang <shengjiu.wang@freescale.com>
Diffstat (limited to 'sound/soc/fsl/fsl_sai.c')
-rw-r--r--sound/soc/fsl/fsl_sai.c14
1 files changed, 8 insertions, 6 deletions
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 21aa7cfc42a2..cd42edd89187 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -72,7 +72,7 @@ static struct fsl_sai_soc_data fsl_sai_imx8mq = {
.imx = true,
.dataline = 0xff,
.fifos = 8,
- .fifo_depth = 32,
+ .fifo_depth = 128,
.flags = 0,
.reg_offset = 8,
.constrain_period_size = false,
@@ -82,7 +82,7 @@ static struct fsl_sai_soc_data fsl_sai_imx8qm = {
.imx = true,
.dataline = 0x3,
.fifos = 1,
- .fifo_depth = 32,
+ .fifo_depth = 64,
.flags = 0,
.reg_offset = 0,
.constrain_period_size = true,
@@ -759,10 +759,12 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
regmap_write(sai->regmap, FSL_SAI_TCSR(offset), 0);
regmap_write(sai->regmap, FSL_SAI_RCSR(offset), 0);
- regmap_update_bits(sai->regmap, FSL_SAI_TCR1(offset), FSL_SAI_CR1_RFW_MASK,
- sai->soc->fifo_depth - FSL_SAI_MAXBURST_TX);
- regmap_update_bits(sai->regmap, FSL_SAI_RCR1(offset), FSL_SAI_CR1_RFW_MASK,
- FSL_SAI_MAXBURST_RX - 1);
+ regmap_update_bits(sai->regmap, FSL_SAI_TCR1(offset),
+ sai->soc->fifo_depth - 1,
+ sai->soc->fifo_depth - FSL_SAI_MAXBURST_TX);
+ regmap_update_bits(sai->regmap, FSL_SAI_RCR1(offset),
+ sai->soc->fifo_depth - 1,
+ FSL_SAI_MAXBURST_RX - 1);
snd_soc_dai_init_dma_data(cpu_dai, &sai->dma_params_tx,
&sai->dma_params_rx);