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author | Joakim Zhang <qiangqing.zhang@nxp.com> | 2020-09-01 21:05:14 +0800 |
---|---|---|
committer | Joakim Zhang <qiangqing.zhang@nxp.com> | 2020-09-02 01:56:28 +0800 |
commit | 243308c68b7bf81a12a2d37e9df4445476c4401d (patch) | |
tree | d06c586e00b564dd2a677913631881344d9fd12d /tools | |
parent | d12f59a8dd5599ba84d9254ef269f77de5d3911e (diff) |
MLK-24667-1 perf vendor: add bandwidth usage metric for i.MX8MM DDR Perf
Add bandwidth usage metric for i.MX8MM DDR Perf.
Test Report:
-------------------------------------------------------
root@imx8mmevk:~# ./perf list metric
List of pre-defined events (to be used in -e):
Metrics:
imx8mm-ddr0-2d-r
[imx8mm: bursts of gpu 2d read from ddr0]
imx8mm-ddr0-2d-w
[imx8mm: bursts of gpu 2d write to ddr0]
imx8mm-ddr0-3d-r
[imx8mm: bursts of gpu 3d read from ddr0]
imx8mm-ddr0-3d-w
[imx8mm: bursts of gpu 3d write to ddr0]
imx8mm-ddr0-a53-r
[imx8mm: bursts of a53 core read from ddr0]
imx8mm-ddr0-a53-w
[imx8mm: bursts of a53 core write to ddr0]
imx8mm-ddr0-all-r
[imx8mm: bytes of all masters read from ddr0]
imx8mm-ddr0-all-w
[imx8mm: bytes of all masters write to ddr0]
---------------------------------------------------------
root@imx8mmevk:~# ./perf stat -a -I 1000 -M imx8mm-ddr0-bandwidth-usage-lpddr4 dd if=/dev/zero of=/dev/null bs=1M count=1000000
1.000127125 324072 imx8_ddr0/read-cycles/ # 33.4 % imx8mm-ddr0-bandwidth-usage-lpddr4
1.000127125 250417562 imx8_ddr0/write-cycles/
1.000127125 1000127125 ns duration_time
2.001282750 293964 imx8_ddr0/read-cycles/ # 33.9 % imx8mm-ddr0-bandwidth-usage-lpddr4
2.001282750 254176749 imx8_ddr0/write-cycles/
2.001282750 1001155625 ns duration_time
3.002299500 234264 imx8_ddr0/read-cycles/ # 33.0 % imx8mm-ddr0-bandwidth-usage-lpddr4
3.002299500 247474957 imx8_ddr0/write-cycles/
3.002299500 1001016750 ns duration_time
4.003355875 202304 imx8_ddr0/read-cycles/ # 32.8 % imx8mm-ddr0-bandwidth-usage-lpddr4
4.003355875 245469156 imx8_ddr0/write-cycles/
4.003355875 1001056375 ns duration_time
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Diffstat (limited to 'tools')
-rw-r--r-- | tools/perf/pmu-events/arch/arm64/arm/cortex-a53/imx8mm-ddr-uncore.json | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/imx8mm-ddr-uncore.json b/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/imx8mm-ddr-uncore.json index 673275162406..db64fa9f66b5 100644 --- a/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/imx8mm-ddr-uncore.json +++ b/tools/perf/pmu-events/arch/arm64/arm/cortex-a53/imx8mm-ddr-uncore.json @@ -1,5 +1,24 @@ [ { + "PublicDescription": "lpddr4 evk board bandwidth usage", + "BriefDescription": "imx8mm: percentage of bandwidth usage for ddr0", + "MetricName": "imx8mm-ddr0-bandwidth-usage-lpddr4", + "MetricExpr": "(( imx8_ddr0\\/read\\-cycles\\/ + imx8_ddr0\\/write\\-cycles\\/) * 4 * 4 / duration_time) / (750 * 1000000 * 4 * 4)", + "MetricGroup": "i.MX8MM_DDR_MON", + "ScaleUnit": "1e2%", + "SocName": "i.MX8MM" + }, + { + "PublicDescription": "ddr4 evk board bandwidth usage", + "BriefDescription": "imx8mm: percentage of bandwidth usage for ddr0", + "MetricName": "imx8mm-ddr0-bandwidth-usage-ddr4", + "MetricExpr": "(( imx8_ddr0\\/read\\-cycles\\/ + imx8_ddr0\\/write\\-cycles\\/) * 4 * 4 / duration_time) / (600 * 1000000 * 4 * 4)", + "MetricGroup": "i.MX8MM_DDR_MON", + "ScaleUnit": "1e2%", + "SocName": "i.MX8MM" + }, + + { "PublicDescription": "Calculate bytes all masters read from DDR based on read-cycles event. DDR interface generates 2 up and 2 down edges in an internal clock cycle, can pass 4 beats of data. 4 bytes of each beat if DDR burst width is 32 bit.", "BriefDescription": "imx8mm: bytes of all masters read from ddr0", "MetricName": "imx8mm-ddr0-all-r", |