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commit da180322582bd9db07f29e6d4a2d170afde0703f upstream.
As it can be seen from DE2 manual, clock range is 0x10000.
Fix it.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 73f122c82775 ("ARM: dts: sun8i: a83t: Add display pipeline")
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Fixes: 21b299209330 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline")
Fixes: d8c6f1f0295c ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3")
[wens@csie.org: added fixes tags]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit fe3a04824f75786e39ed74e82fb6cb2534c95fe4 upstream.
When the AHCI device node was added, it was added in the wrong location
in the device tree file. The device nodes should be sorted by register
address.
Move the device node to before EHCI1, where it belongs.
Fixes: 41c64d3318aa ("ARM: dts: sun8i: r40: add sata node")
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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This reverts commits 3d109bdca981 ("ARM: dts: sunxi: Remove useless
phy-names from EHCI and OHCI"), 0a3df8bb6dad ("ARM: dts: sunxi: h3/h5:
Remove useless phy-names from EHCI and OHCI") and 3c7ab90aaa28 ("arm64:
dts: allwinner: Remove useless phy-names from EHCI and OHCI").
It turns out that while the USB bindings were not mentionning it, the PHY
client bindings were mandating that phy-names is set when phys is. Let's
add it back.
Fixes: 3d109bdca981 ("ARM: dts: sunxi: Remove useless phy-names from EHCI and OHCI")
Fixes: 0a3df8bb6dad ("ARM: dts: sunxi: h3/h5: Remove useless phy-names from EHCI and OHCI")
Fixes: 3c7ab90aaa28 ("arm64: dts: allwinner: Remove useless phy-names from EHCI and OHCI")
Reported-by: Emmanuel Vadot <manu@bidouilliste.com>
Signed-off-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20191002112651.100504-1-mripard@kernel.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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The watchdog has a clock on all our SoCs, but it wasn't always listed.
Add it to the devicetree where it's missing.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The watchdog has an interrupt on all our SoCs, but it wasn't always listed.
Add it to the devicetree where it's missing.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Even though the binding mentions that the PHY name must be "phy", it turns
out that all our DTs had "hdmi-phy" instead.
The code doesn't care about the phy-names property, so we can just change
our DTs to match the binding, without any side effect.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The DE2 bus takes two clocks, named bus and mod according to the binding.
However, the order of these clocks change from one SoC to another. Even
though it might not be an issue in most cases, having consistency will help
if we ever need to have some code to deal with deprecated bindings, and in
general it's just better.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Unlike what's being reported in the device tree so far, the RTC in the R40
is quite different from the H3. Indeed it doesn't have the internal
oscillator output, and it has only a single interrupt. Let's add a
compatible for it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Neither the OHCI or EHCI bindings are using the phy-names property, so we
can just drop it.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The SATA controller never have any children nodes, so we don't need the
address and size cells properties.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The AHCI node was introduced with a typo in the reset-names property that
got written resets-name instead.
This was working because the reset is optional for that driver, and the
controller was put out of reset by the bootloader.
Fixes: 41c64d3318aa ("ARM: dts: sun8i: r40: add sata node")
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Our display engine endpoints trigger some DTC warnings due to the fact that
we're having a single endpoint that doesn't need any reg property, and
since we don't have a reg property, we don't need the address-cells and
size-cells properties anymore.
Fix those
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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CLK_OUT_A, an external clock output function driven from the clock
control unit, on the R40 is sometimes used to provide a low rate low
power clock to a WiFi or Bluetooth controller.
This patch adds a pinmux setting for it.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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UART3 on the PG pingroup on the R40 SoC is commonly used to connect the
bluetooth controller in a WiFi+Bluetooth combo chip, with the WiFi bits
also on the PG pingroup.
This patch adds two device nodes for UART3 on PG pingroup, one for the
RX/TX pins, and one for the RTS/CTS pins. Consumers can reference either
just the RX/TX pinmux setting or both, depending on the application.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The R40 has an RTC hardware block, which has additional registers
that are not related to RTC or clock functions, and is otherwise
compatible with the H3's RTC.
Add a device node for it, and fix up any references to the LOSC.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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The R40 datasheet specifies a tolerance range for the external
oscillators used. Add them to the device tree as the clock accuracy.
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC device tree updates from Arnd Bergmann:
"There are close to 800 indivudal changesets in this branch again,
which feels like a lot. There are particularly many changes for the
NVIDIA Tegra platform this time, in fact more than it has seen in the
two years since the v4.9 merge window. Aside from this, it's been
fairly normal, with lots of changes going into Renesas R-CAR, NXP
i.MX, Allwinner Sunxi, Samsung Exynos, and TI OMAP.
Most of the changes are for adding new features into existing boards,
for brevity I'm only mentioning completely new machines and SoCs here.
For the first time I think we have (slightly) more new 64-bit hardware
than 32-bit:
Two boards get added for TI OMAP: Moxa UC-2101 is an industrial
computer, see https://www.moxa.com/product/UC-2100.htm; GTA04A5 is a
minor variation of the motherboards of the GTA04 phone, see
https://shop.goldelico.com/wiki.php?page=GTA04A5
Clearfog is a nice little board for quad-core Marvell Armada 8040
network processor, see
https://www.solid-run.com/marvell-armada-family/clearfog-gt-8k/
Two additional server boards come with the Aspeed baseboard management
controllers: Stardragon4800 is an arm64 reference platform made by HXT
(based on Qualcomm's server chips), and TiogaPass is an Open Compute
mainboard with x86 CPUs. Both use the ARM11 based AST2500 chips in the
BMC.
NXP i.MX usually sees a lot of new boards each release. This time
there we only add one minor variant: ConnectCore 6UL SBC Pro uses the
same SoM design as the ConnectCore 6UL SBC Express added later.
However, there is a new chip, the i.MX6ULZ, which is an even smaller
variant of the i.MX6ULL, with features removed. There is also support
for the reference board design, the i.MX6ULZ 14x14 EVK.
A new Raspberry Pi variant gets added, this one is the CM3 compute
module based on bcm2837, it was launched in early 2017 but only now
added to the kernel, both as 32-bit and as 64-bit files, as we tend to
do for Raspberry Pi.
On the Allwinner side, everything is again about cheap development
boards, usually of the "Fruit Pi" variety. The new ones this time are:
- Orange Pi Zero Plus2: http://www.orangepi.org/OrangePiZeroPlus2/
- Orange Pi One Plus: http://www.orangepi.org/OrangePiOneplus/
- Pine64 LTS: https://www.pine64.org/?product=pine-a64-lts
- Banana Pi M2+ H5: http://www.banana-pi.org/m2plus.html
The last one of these is now a 64-bit version of the earlier Banana Pi
M2+ H3, with the same board layout.
Similarly, for Rockchips, get get another variant of the 32-bit Asus
Tinker board, the model 'S' based on rk3288, and three now boards
based on the popular RK3399 chip:
- ROC-RK3399-PC: https://libre.computer/products/boards/roc-rk3399-pc/
- Rock960: https://www.96boards.org/product/rock960/
- RockPro64: https://www.pine64.org/?page_id=61454
These are all quite powerful boards with lots of RAM and I/O, and the
RK3399 is the same chip used in several Chromebooks. Finally, we get
support for the PX30 (aka rk3326) chip, which is based on the low-end
64-bit Cortex-A35 CPU core. So far, only the evaluation board is
supported.
One more Banana Pi is added with a Mediatek chip: Banana Pi R64 is
based on the MT7622 WiFi router platform, and the first product I've
seen with a 64-bit Mediatek chip in that market:
http://www.banana-pi.org/r64.html
For HiSilicon, we gain support for the Hi3670 SoC and HiKey 370
development board, which are similar to the Hi3660 and Hikey 360
respectively, but add support for an NPU.
Amlogic gets initial support for the Meson-G12A chip (S905D2), another
quad-core Cortex-A53 SoC, and its evaluation platform. On the 32-bit
side, we gain support for an actual end-user product, the Endless
Computers Endless Mini based on Meson8b (S805), see
https://endlessos.com/computers/
Qualcomm adds support for their MSM8998 SoC and evaluation platform.
This chip is commonly known as the Snapdragon 835, and is used in
high-end phones as well as low-end laptops.
For Renesas, a very bare support for the r8a774a1 (RZ/G2M) is added,
but no boards for this one. However, we do add boards for the
previously added r8a77965 (R-Car M3-N): the M3NULCB Kingfisher and the
M3NULCB Starter Kit Pro.
While we have lots of DT changes for NVIDIA to update the existing
files, the only board that gets added is the Toradex Colibri T20 on
Colibri Evaluation Board for the old Tegra2.
Synaptics add support for their AS370 SoC, which is part of the
(formerly Marvell) Berlin line of set-top-box chips used e.g. in the
various Google Chromecast. Only the .dtsi gets added at this point, no
actual machines"
* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (721 commits)
ARM: dts: socfgpa: remove ethernet aliases from dtsi
arm64: dts: stratix10: add ethernet aliases
dt-bindings: mediatek: Add bindig for MT7623 IOMMU and SMI
dt-bindings: mediatek: Add JPEG Decoder binding for MT7623
dt-bindings: iommu: mediatek: Add binding for MT7623
dt-bindings: clock: mediatek: add support for MT7623
ARM: dts: mvebu: armada-385-db-88f6820-amc: auto-detect nand ECC properites
ARM: dts: da850-lego-ev3: slow down A/DC as much as possible
ARM: dts: da850-evm: Enable tca6416 on baseboard
arm64: dts: uniphier: Add USB2 PHY nodes
arm64: dts: uniphier: Add USB3 controller nodes
ARM: dts: uniphier: Add USB2 PHY nodes
ARM: dts: uniphier: Add USB3 controller nodes
arm64: dts: meson-axg: s400: disable emmc
arm64: dts: meson-axg: s400: add missing emmc pwrseq
arm64: dts: clearfog-gt-8k: add PCIe slot description
ARM: dts: at91: sama5d4_xplained: even nand memory partitions
ARM: dts: at91: sama5d3_xplained: even nand memory partitions
ARM: dts: at91: at91sam9x5cm: even nand memory partitions
ARM: dts: at91: sama5d2_ptc_ek: fix bootloader env offsets
...
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The R40 HDMI PHY seems to be different to the A64 one, the A64 one
has no input mux, but the R40 one has.
Drop the A64 fallback compatible from the HDMI PHY node in R40 DT.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[wens@csie.org: Fix subject prefix order]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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R40 have a sata controller which is the same as A20.
This patch adds a DT node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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address-cells/size-cells is unnecessary for dwmac-sun8i node.
It was in early days, but since a mdio node is used, it could be
removed.
This patch fix the following DT warning:
Warning (avoid_unnecessary_addr_size): /soc/ethernet@1c50000: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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R40 has 4 TCONs, but only 2 of them can receive some kind of output at
the same time. Let's disable them by default, so only those which are
really connected on board can be enabled in board dts file.
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Current R40 is missing some graph connections between TCON TOP and
TCONs.
Add them.
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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A83T and R40 TCON TV are very similar. However, R40 TCON TV is wired
differently, which makes it incompatible with A83T TCON TV.
Because of that, remove fallback A83T TCON TV compatible.
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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sun4i-drm DT binding, second paragraph of the first section says:
For all connections between components up to the TCONs in the display
pipeline, when there are multiple components of the same type at the
same depth, the local endpoint ID must be the same as the remote
component's index.
Add mixer ids in R40 DT as mandated by DT binding.
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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R40 has pretty unique display pipeline. Because of that, H3 display
engine compatible fallback should be removed.
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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Add all entries needed for HDMI to function properly.
Since R40 has highly configurable pipeline, both mixers and both TCON
TVs are added. Board specific DT should then connect them together
trough TCON TOP muxers to best fit the purpose of the board.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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The R40 SoC has a GMAC (gigabit capable Ethernet controller). Add a
device node for it. The only publicly available board for this SoC
uses an RGMII PHY. Add a pinmux node for it as well.
Since this SoC also has an old 10/100 Mbps EMAC, which also has an
MDIO bus controller, the MDIO bus for the GMAC is labeled "gmac_mdio".
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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Allwinner R40 SoC features a USB OTG port and two USB HOST ports.
Add support for the host ports in the DTSI file.
The OTG controller still cannot work with existing compatibles, and needs
more investigation. So it's not added yet.
Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
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The R40 SoC has a watchdog like the one on A20, in the timer memory zone
(which is also the same on A20).
Add the device tree node for it.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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The Allwinner R40 SoC is marketed as the successor to the A20 SoC.
The R40 is a smaller chip than the A20, but features the same set
of programmable pins, with a couple extra pins and some new pin
functions. The chip features 4 Cortex-A7 cores and a Mali-400 MP2
GPU. It retains most if not all features from the A20, while adding
some new features, such as MIPI DSI output, or updating various
hardware blocks, such as DE 2.0.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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