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Increased the clock rate for better performance.
Signed-off-by: Han Xu <han.xu@nxp.com>
(cherry picked from commit 582ba08afcaf79fc09465a0cd2dd66cf1e86813e)
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After fix the ADMA length mismatch issue on imx8mm, we can
support eMMC CMDQ, so enable it. This patch also make imx8mm
support HS400ES mode.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
(cherry picked from commit 861d1d962e90f1244bfc8249d111c633c9c038ca)
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the sim_hsio clock must be on before doing hsio power domain on/off.
Assign this clock to hiso power domain to make sure this clock is
enable before power domain on/off.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
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imx8mm"
This reverts commit 68b8fbbad02bc3bfca95fdc75ee67bd06d91b684.
the audio playback issue is caused by incorrect setting for WAIT mode.
no need to change the latency setting, so back to use the original
latency setting.
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According to design team, the A53 OPP table should follow the
typical value in datasheet, NOT min value, as it needs to cover
PMIC tolerance, part variation etc..
So update the A53 OPP table according to datasheet Rev.0 01/2019:
Consumer:
1.8GHz: 1.0V;
1.6GHz: 0.95V;
1.2GHz: 0.85V;
Industrial:
1.6GHz: 0.95V;
1.2GHz: 0.85V;
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
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- Correct the rpmsg compatible property on imx8mm/mq.
- Move the rpmsg dts to the -m4 dts on imx8qm.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Update CPU opp table according to latest datasheet Rev.0 01/2019:
Market_segment: fuse offset(0x440), bit[7:6]:
Consumer:
1.8GHz: 0.95V;
1.6GHz: 0.9V;
1.2GHz: 0.805V;
Industrial:
1.6GHz: 0.9V;
1.2GHz: 0.805V;
The min step of PMIC bd71837 is 10mV for buck2, so 0.81V is used
for 1.2GHz setpoint.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
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Default value must be prefixed by "0".
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
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Fix the wrong configuration of "dmas" in dts. This leads the spi
transfer error in dma mode and cause this issue.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
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The IMX_DMATYPE_SAI(24) performance is not enough to support high
sample rate/channels of audio case, there is a lot of underrun and
the sound is noise, the reason is that with this script, sdma copy data
through a long path (SDMA->pl301_audio -> pl301_display -> … ->
pl301_wakeup -> AIPS1 -> SPBA2 -> SAI).
The IMX_DMATYPE_SSI_SP(2) performance is better, which go through a shorter
path (SDMA -> SPBA2 -> SAI).
So we switch to use the IMX_DMATYPE_SSI_SP script, then 384k/32b/16c is
supported well.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit d5b70e9232218c419f7f6f843249e4bba84156b6)
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Use "fsl, imx8mm-usb" for imx8mm usb controller driver.
Acked-by: Peter Chen <peter.chen@nxp.com>
Signed-off-by: Li Jun <jun.li@nxp.com>
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The PMU's interrupt is PPI. Correct the pmu interrupt parent of i.MX8MQ/MM.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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Add the missing attribute dmas and dma-names for ecspi1~3 to fix the
following error log.
LOG: spi_imx 30820000.ecspi: dma setup error -19, use pio
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
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Parse the clock tree and stop when you find one of the
audio_plls. If this audio_pll cannot support the required
rate, change the parent to the other pll.
Set rate to rate * 1024 so we can support all parameter
configurations with a minimum clock rate.
This is required to support all rates multiple of 11025 and 8000.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
Reviewed-by: Daniel Baluta <daniel.baluta@nxp.com>
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Add the gpmi and apbh-dma nodes to fsl-imx8mm.dtsi file.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Han Xu <han.xu@nxp.com>
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Use GPR node to simplify codes for MIPI CSI phy reset
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 0f576c50e71cadf43755d44d102beb813595d007)
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When system enter suspend, the system counter timer will stop counting.
So need to add "arm,no-tick-in-suspend" flag. Otherwise, the system
timekeeping will be wrong.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 1e15dda8c50a474891ccd1cb7fa7b41a8abbadc2)
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add board compatible string for imx7ulp and m845s
Signed-off-by: Xianzhong <xianzhong.li@nxp.com>
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interrupt-parent are assigned to node gpc in root node, so
no need to set it again in child node which needs gpc as
the interrupt-parent.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
(cherry picked from commit f1e4158c785c8b6b74a8206d07f648495b755acf)
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The devices in the device tree are registered in the
top-down order. But when system suspend entered, the
device tree is walked in a bottom-up order to suspend
devices. So change the display device nodes register
order to be:
LCDIF -> SEC DSIM -> Display Subsystem
Since in display subystem, it will disable the whole
display pipeline. So this should be first suspended
before LCDIF and SEC DSIM. And besides, the SEC DSIM
is better to be suspended before LCDIF which is the
same with the sequence for display pipeline disables.
And when system resume entered, the devices resume
sequence is:
LCDIF -> SEC DSIM -> Display Subsystem
Which is a top-down order and is the correct sequence
for display devices resume.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit 4ce74783e6a50898a433372f5968175b20d4ef0c)
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Add a different '#address-cells' and '#size-cells' properties
definition for incoming possible panel child node.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
(cherry picked from commit ccaa041b96a3124521f02c1e3d223890e659433b)
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Correct the power domain device node on i.MX8MM. the older one is
removed, add the updated one for it.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
(cherry picked from commit 8a88ee0404665edc11bee2e692235239f5faa21a)
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The proper SPDIF1 core and system clocks are AUDIO AHB clock.
Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Reviewed-by: Shengjiu Wang <shengjiu.wang@nxp.com>
(cherry picked from commit 5b8537746c2eb5ede8216e104ae75c38b82b7ce0)
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The resources retrieved by CAAM driver was wrong as the size
was not correct hence future uses might have issues.
before:
[ 3.010744] caam 30900000.caam:
sm res: [start: 0000000000100000,
end: 0000000000107ffe,
name: /caam-sm@00100000,
flags:0x200 desc:0x0] -> size: 0x7fff
modif to actual size:
[ 3.012495] caam 30900000.caam:
sm res: [start: 0000000000100000,
end: 0000000000107fff,
name: /caam-sm@00100000,
flags:0x200 desc:0x0] -> size: 0x8000
Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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Signed-off-by: Silvano di Ninno <silvano.dininno@nxp.com>
Reviewed-by: Franck Lenormand <franck.lenormand@nxp.com>
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Add busfreq node support on i.MX8MM. busfreq support is enabled by
default, but it need to be disabled on DDR4 validation board at present.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 6d5307eb88a6f5bfdb7123fd9165681cd5a31c7d)
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Add temperature sensor device and thermal on i.MX8MM.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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Set GPU AHB CLK to 400M to meet design requirement.
Date: 11th Jul, 2018
Signed-off-by: Ella Feng <ella.feng@nxp.com>
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Fix incorrect reg address for ESCPI2/ECSPI3
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
(cherry picked from commit cf15610449eb581adb8c2f7f1bb420191b4ee617)
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Add device nodes for pwm support on imx8mm SoC
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
(cherry picked from commit 25b240c986083e83d827795255f554f3f896f9c2)
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Add FlexSPI in i.MX8MM EVK device tree
Signed-off-by: Han Xu <han.xu@nxp.com>
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Add ECSPI devices nodes for imx8mm SoC
Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
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remove inapplicable compatible string for spdif
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Reviewed-by: Viorel Suman <viorel.suman@nxp.com>
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Add nodes for clock disp_axi and disp_apb for access to avoid hang issue.
On i.MX8MM, use the register in CSI to do MIPI PHY reset, so add these
clocks for MIPI CSI driver as well.
Signed-off-by: Robby Cai <robby.cai@nxp.com>
Reviewed-by: Guoniu.Zhou <guoniu.zhou@nxp.com>
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The display pipeline provided by IMX8MM soc is: LCDIF --> MIPI DSI.
This patch re-organize the LCDIF and MIPI DSI device nodes to be
suitable for DRM/KMS drivers. Besides, a new device node 'dispmix_gpr'
which is required by LCDIF and MIPI DSI is added.
Signed-off-by: Fancy Fang <chen.fang@nxp.com>
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PCIe ep rc validation system is one remote processors
communications.
Add the reserved region in pcie node, and use this region as
ddr test region in pcie ep rc validation system.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Add ocotp node to make nvmem work.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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After the WAIT mode is enabled on imx8mm, the previous latency setting
seems can NOT meet the system the latency requirement. audio playback is
impacted by cpuidle. So increasing the latency setting as large as possible
to eliminate the impact of system performance. The latency value is not very
accurate, need to be updated after we have enough performance test result.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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pcie aux clock is mandatory required by pcie power management.
add the aux clock into imx8mm pcie dts node explicitly.
pcie ctrl clock would be turned on, when pcie root clock
is enabled.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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add node for MIPI CSI, CSI, and camera OV5640
Signed-off-by: Robby Cai <robby.cai@nxp.com>
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Add the pcie support for imx8mm and verify
it on imx8mm evk board when internal pll is
used as ref clock.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Enable DDR monitor
Signed-off-by: Frank Li <Frank.Li@nxp.com>
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Add micfil DAI node in dtsi and pdm sound card in dts.
We also moved ak5558 nodes into separate dts since
ak5558 uses sai5 which share some pins with micfil.
Signed-off-by: Cosmin-Gabriel Samoila <cosmin.samoila@nxp.com>
(cherry picked from commit 8451c6886b0175b7e1391293aa9fb461395f8485)
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enable rpmsg on imx8mm
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Enable hantro 845 decoder/encoder on device tree
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
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Date: 14th May, 2018
Signed-off-by: Ella Feng <ella.feng@nxp.com>
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Add all uart ports on evk board, and enable uart1 port for
Murata 1PJ bluetooth support.
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Add i.MX8MM OPP table to support cpu-freq.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
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Add i.MX8MM cpu-idle support, level #1 is wfi,
level #2 is ARM power gated.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
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