From b2afd6ee3f3d2f179bced041b7711f220a377387 Mon Sep 17 00:00:00 2001 From: Fancy Fang Date: Tue, 17 Nov 2020 10:35:11 +0800 Subject: MLK-24998-8 arm64: dts: imx8mm: assign osc_24m to dsi PHY REF clock source Due to commit b3a420c9cf3f (MLK-24998-4 drm/bridge: sec-dsim: use 12MHz for default PHY REF clock), the dsi PHY reference clock source need to be assigned to osc_24m clock. Signed-off-by: Fancy Fang Reviewed-by: Jacky Bai (cherry picked from commit 2972241b831ed65f641ccdb80b504cadef0ba591) --- arch/arm64/boot/dts/freescale/imx8mm.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm64/boot/dts/freescale/imx8mm.dtsi') diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi b/arch/arm64/boot/dts/freescale/imx8mm.dtsi index 121459b19355..75516614e5bd 100755 --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi @@ -1146,8 +1146,8 @@ assigned-clocks = <&clk IMX8MM_CLK_DSI_CORE>, <&clk IMX8MM_CLK_DSI_PHY_REF>; assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_266M>, - <&clk IMX8MM_VIDEO_PLL1_OUT>; - assigned-clock-rates = <266000000>, <594000000>; + <&clk IMX8MM_CLK_24M>; + assigned-clock-rates = <266000000>, <12000000>; interrupts = ; dsi-gpr = <&dispmix_gpr>; resets = <&mipi_dsi_resets>; -- cgit v1.2.3