// SPDX-License-Identifier: GPL-2.0 OR X11 /* * Copyright 2014-2020 Toradex * Copyright 2012 Freescale Semiconductor, Inc. * Copyright 2011 Linaro Ltd. */ /dts-v1/; #include #include #include #include #include "imx6q.dtsi" #include "imx6qdl-apalis.dtsi" / { model = "Toradex Apalis iMX6Q/D Module on Ixora Carrier Board V1.2"; compatible = "toradex,apalis_imx6q-ixora-v1.2", "toradex,apalis_imx6q-ixora", "toradex,apalis_imx6q", "fsl,imx6q"; aliases { i2c0 = &i2c1; i2c1 = &i2c3; i2c2 = &i2c2; rtc0 = &rtc_i2c; rtc1 = &snvs_rtc; }; chosen { stdout-path = "serial0:115200n8"; }; gpio-keys { compatible = "gpio-keys"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_keys>; wakeup { label = "Wake-Up"; gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; linux,code = ; debounce-interval = <10>; wakeup-source; }; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_leds_ixora>; led4-green { label = "LED_4_GREEN"; gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; }; led4-red { label = "LED_4_RED"; gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; }; led5-green { label = "LED_5_GREEN"; gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>; }; led5-red { label = "LED_5_RED"; gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>; }; }; reg_3v3_vmmc: regulator-3v3-vmmc { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enable_3v3_vmmc>; regulator-name = "3v3_vmmc"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>; startup-delay-us = <100>; enable-active-high; }; reg_can1_supply: regulator-can1-supply { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enable_can1_power>; regulator-name = "can1_supply"; gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>; enable-active-high; startup-delay-us = <1000>; }; reg_can2_supply: regulator-can2-supply { compatible = "regulator-fixed"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enable_can2_power>; regulator-name = "can2_supply"; gpio = <&gpio3 15 GPIO_ACTIVE_HIGH>; enable-active-high; startup-delay-us = <1000>; }; /delete-node/ v4l2_cap_1; }; /* Apalis SPI1 */ &ecspi1 { status = "okay"; spidev0: spidev@0 { compatible = "toradex,evalspi"; reg = <0>; spi-max-frequency = <18000000>; }; }; &can1 { status = "okay"; xceiver-supply = <®_can1_supply>; }; &can2 { status = "okay"; xceiver-supply = <®_can2_supply>; }; /* I2C1_SDA/SCL on MXM3 209/211 (e.g. RTC on carrier board) */ &i2c1 { status = "okay"; /* M41T0M6 real time clock on carrier board */ rtc_i2c: rtc@68 { compatible = "st,m41t0"; reg = <0x68>; }; eeprom: eeprom@50 { compatible = "atmel,24c02"; reg = <0x50>; pagesize = <16>; }; }; /* * I2C3_SDA/SCL (CAM) on MXM3 pin 201/203 (e.g. camera sensor on carrier * board) */ &i2c3 { status = "okay"; adv7280: adv7280@21 { compatible = "adv7280"; reg = <0x21>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>; clocks = <&clks IMX6QDL_CLK_CKO2>; clock-names = "csi_mclk"; DOVDD-supply = <®_3p3v>; AVDD-supply = <®_3p3v>; DVDD-supply = <®_3p3v>; PVDD-supply = <®_3p3v>; csi_id = <0>; mclk = <24000000>; mclk_source = <1>; status = "okay"; }; /* Video ADC on Analog Camera Module */ adv7180: adv7180@21 { compatible = "adv,adv7180"; reg = <0x21>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>; clocks = <&clks IMX6QDL_CLK_CKO2>; clock-names = "csi_mclk"; DOVDD-supply = <®_3p3v>; /* 3.3v */ AVDD-supply = <®_3p3v>; /* 1.8v */ DVDD-supply = <®_3p3v>; /* 1.8v */ PVDD-supply = <®_3p3v>; /* 1.8v */ csi_id = <0>; mclk = <24000000>; mclk_source = <1>; cvbs = <1>; status = "disabled"; }; max9526: max9526@20 { compatible = "maxim,max9526"; reg = <0x20>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>; clocks = <&clks IMX6QDL_CLK_CKO2>; clock-names = "csi_mclk"; DVDDIO-supply = <®_3p3v>; /* 3.3v */ AVDD-supply = <®_3p3v>; /* 1.8v */ DVDD-supply = <®_3p3v>; /* 1.8v */ csi_id = <0>; mclk = <24000000>; mclk_source = <1>; cvbs = <1>; status = "okay"; }; }; &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_reset_moci>; /* active-high meaning opposite of regular PERST# active-low polarity */ reset-gpio = <&gpio1 28 GPIO_ACTIVE_HIGH>; status = "okay"; }; &pwm1 { status = "okay"; }; &pwm2 { status = "okay"; }; &pwm3 { status = "okay"; }; &pwm4 { status = "okay"; }; ®_usb_otg_vbus { status = "okay"; }; ®_usb_host_vbus { status = "okay"; }; &sata { status = "okay"; }; &sound_spdif { status = "okay"; }; &spdif { status = "okay"; }; &uart1 { status = "okay"; }; &uart2 { status = "okay"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2_dte &pinctrl_uart24_forceoff>; #if 0 linux,rs485-enabled-at-boot-time; rs485-rts-active-low; rs485-rx-during-tx; #endif }; &uart4 { status = "okay"; /* * note that uart4 is only working with pinctrl_uart24_forceoff that is * already defined in &uart2 */ }; &uart5 { status = "okay"; }; &usbh1 { vbus-supply = <®_usb_host_vbus>; status = "okay"; }; &usbotg { vbus-supply = <®_usb_otg_vbus>; status = "okay"; }; /* MMC1 */ &usdhc1 { pinctrl-names = "default", "sleep"; pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>; pinctrl-1 = <&pinctrl_usdhc1_4bit_sleep &pinctrl_mmc_cd_sleep>; bus-width = <4>; cap-power-off-card; vmmc-supply = <®_3v3_vmmc>; status = "okay"; }; &iomuxc { /* Mux the Apalis GPIOs */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2 &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4 &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8 >; pinctrl_leds_ixora: ledsixoragrp { fsl,pins = < MX6QDL_PAD_SD2_DAT1__GPIO1_IO14 0x1b0b0 MX6QDL_PAD_SD2_DAT3__GPIO1_IO12 0x1b0b0 MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0 MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0 >; }; pinctrl_uart24_forceoff: uart24_forceoff { fsl,pins = < MX6QDL_PAD_SD2_CMD__GPIO1_IO11 0x1b0b0 >; }; pinctrl_enable_3v3_vmmc: enable_3v3_vmmc { fsl,pins = < MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0 >; }; pinctrl_enable_can1_power: enable_can1_power { fsl,pins = < MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0 >; }; pinctrl_enable_can2_power: enable_can2_power { fsl,pins = < MX6QDL_PAD_EIM_DA15__GPIO3_IO15 0x1b0b0 >; }; pinctrl_mmc_cd_sleep: gpiommccdgrpslp { fsl,pins = < /* MMC1 CD */ MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0 >; }; pinctrl_usdhc1_4bit_sleep: usdhc1grp_4bit_sleep { fsl,pins = < MX6QDL_PAD_SD1_CMD__SD1_CMD 0x3000 MX6QDL_PAD_SD1_CLK__SD1_CLK 0x3000 MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x3000 MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x3000 MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x3000 MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x3000 >; }; };