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authorFrancesco Dolcini <francesco.dolcini@toradex.com>2022-05-18 15:38:49 +0200
committerFrancesco Dolcini <francesco.dolcini@toradex.com>2022-06-27 13:27:02 +0000
commit08de429cd3a25e691dc73aff1762210f7f908562 (patch)
treeba584d01d95513408c06eda2e8ba26e0b7226944
parent993e386bbae9367138b2fd2af0a37b77aed49012 (diff)
mx6: ddr: Fix disabling on-die termination
In case rtt_nom is set to 0 keep ODT disabled (MMDC MPODTCTRL = 0). No changes required for DDR MR1 Rtt_Nom impedance register, 0 value is already handled correctly. No board is currently affected by this change (rtt_nom != 0 on all i.MX6 ddr3 boards), this will be used by a follow-up change. Fixes: fe0f7f7842e1 ("mx6: add mmdc configuration for MX6Q/MX6DL") Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
-rw-r--r--arch/arm/mach-imx/mx6/ddr.c13
1 files changed, 11 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/mx6/ddr.c b/arch/arm/mach-imx/mx6/ddr.c
index a23fb6f8c6..5189bdc5f4 100644
--- a/arch/arm/mach-imx/mx6/ddr.c
+++ b/arch/arm/mach-imx/mx6/ddr.c
@@ -1454,8 +1454,17 @@ void mx6_ddr3_cfg(const struct mx6_ddr_sysinfo *sysinfo,
MMDC1(mprddqby3dl, 0x33333333);
}
- /* MMDC Termination: rtt_nom:2 RZQ/2(120ohm), rtt_nom:1 RZQ/4(60ohm) */
- val = (sysinfo->rtt_nom == 2) ? 0x00011117 : 0x00022227;
+ /*
+ * MMDC Termination: rtt_nom:2 RZQ/2(120ohm),
+ * rtt_nom:1 RZQ/4(60ohm),
+ * rtt_nom:0 Disabled
+ */
+ if (sysinfo->rtt_nom == 0)
+ val = 0x00000000;
+ else if (sysinfo->rtt_nom == 2)
+ val = 0x00011117;
+ else
+ val = 0x00022227;
mmdc0->mpodtctrl = val;
if (sysinfo->dsize > 1)
MMDC1(mpodtctrl, val);