diff options
| author | Ye Li <ye.li@nxp.com> | 2017-09-13 01:25:15 -0500 |
|---|---|---|
| committer | Ye Li <ye.li@nxp.com> | 2017-09-13 02:51:57 -0500 |
| commit | 8243f83f6d4a517e06ac02d8cdfed41de8c9fb4d (patch) | |
| tree | 348a0f510bb0614892dec2c2a88ed243e74a95f7 | |
| parent | 4f699dbc3102814f47b9109bd5c52433573e3afe (diff) | |
MLK-16443 imx8qm/qxp: Fix UART pad setting
Found kernel won't be loaded when UART does not connect to the board. This is
because UART received one data with frame error in this case, and stop in
u-boot console.
The root cause is we set wrong pad setting for UART. The pad should be set
to pull up not pull down. The pull down will cause problem to UART START bit.
This patch fix the UART pad to 0x600020 (input and output, high drive strength,
and pull up).
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Fugang Duan <fugang.duan@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | arch/arm/dts/fsl-imx8qm-lpddr4-arm2.dts | 8 | ||||
| -rw-r--r-- | arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts | 4 | ||||
| -rw-r--r-- | arch/arm/dts/fsl-imx8qxp-mek.dts | 4 | ||||
| -rw-r--r-- | board/freescale/imx8qm_arm2/imx8qm_arm2.c | 2 | ||||
| -rw-r--r-- | board/freescale/imx8qxp_arm2/imx8qxp_arm2.c | 2 | ||||
| -rw-r--r-- | board/freescale/imx8qxp_mek/imx8qxp_mek.c | 2 |
6 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/dts/fsl-imx8qm-lpddr4-arm2.dts b/arch/arm/dts/fsl-imx8qm-lpddr4-arm2.dts index 4730b27f76..b46342bf34 100644 --- a/arch/arm/dts/fsl-imx8qm-lpddr4-arm2.dts +++ b/arch/arm/dts/fsl-imx8qm-lpddr4-arm2.dts @@ -132,10 +132,10 @@ pinctrl_lpuart0: lpuart0grp { fsl,pins = < - SC_P_UART0_RX_DMA_UART0_RX 0x0600004c - SC_P_UART0_TX_DMA_UART0_TX 0x0600004c - SC_P_UART0_RTS_B_DMA_UART0_RTS_B 0x0600004c - SC_P_UART0_CTS_B_DMA_UART0_CTS_B 0x0600004c + SC_P_UART0_RX_DMA_UART0_RX 0x06000020 + SC_P_UART0_TX_DMA_UART0_TX 0x06000020 + SC_P_UART0_RTS_B_DMA_UART0_RTS_B 0x06000020 + SC_P_UART0_CTS_B_DMA_UART0_CTS_B 0x06000020 >; }; diff --git a/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts b/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts index c807a545a0..e42e2007cf 100644 --- a/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts +++ b/arch/arm/dts/fsl-imx8qxp-lpddr4-arm2.dts @@ -120,8 +120,8 @@ pinctrl_lpuart0: lpuart0grp { fsl,pins = < - SC_P_UART0_RX_ADMA_UART0_RX 0x0600004c - SC_P_UART0_TX_ADMA_UART0_TX 0x0600004c + SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 + SC_P_UART0_TX_ADMA_UART0_TX 0x06000020 >; }; diff --git a/arch/arm/dts/fsl-imx8qxp-mek.dts b/arch/arm/dts/fsl-imx8qxp-mek.dts index 064ecb84ce..edc201c933 100644 --- a/arch/arm/dts/fsl-imx8qxp-mek.dts +++ b/arch/arm/dts/fsl-imx8qxp-mek.dts @@ -61,8 +61,8 @@ pinctrl_lpuart0: lpuart0grp { fsl,pins = < - SC_P_UART0_RX_ADMA_UART0_RX 0x0600004c - SC_P_UART0_TX_ADMA_UART0_TX 0x0600004c + SC_P_UART0_RX_ADMA_UART0_RX 0x06000020 + SC_P_UART0_TX_ADMA_UART0_TX 0x06000020 >; }; diff --git a/board/freescale/imx8qm_arm2/imx8qm_arm2.c b/board/freescale/imx8qm_arm2/imx8qm_arm2.c index 18736a01c4..2a1457ef9f 100644 --- a/board/freescale/imx8qm_arm2/imx8qm_arm2.c +++ b/board/freescale/imx8qm_arm2/imx8qm_arm2.c @@ -54,7 +54,7 @@ DECLARE_GLOBAL_DATA_PTR; | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT)) + | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) static iomux_cfg_t uart0_pads[] = { SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL), diff --git a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c index e5843746a8..0ee22da545 100644 --- a/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c +++ b/board/freescale/imx8qxp_arm2/imx8qxp_arm2.c @@ -58,7 +58,7 @@ DECLARE_GLOBAL_DATA_PTR; | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT)) + | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) static iomux_cfg_t uart0_pads[] = { SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL), diff --git a/board/freescale/imx8qxp_mek/imx8qxp_mek.c b/board/freescale/imx8qxp_mek/imx8qxp_mek.c index 3da4571999..91a2024123 100644 --- a/board/freescale/imx8qxp_mek/imx8qxp_mek.c +++ b/board/freescale/imx8qxp_mek/imx8qxp_mek.c @@ -54,7 +54,7 @@ DECLARE_GLOBAL_DATA_PTR; | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) #define UART_PAD_CTRL ((SC_PAD_CONFIG_OUT_IN << PADRING_CONFIG_SHIFT) | (SC_PAD_ISO_OFF << PADRING_LPCONFIG_SHIFT) \ - | (SC_PAD_28FDSOI_DSE_DV_LOW << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PD << PADRING_PULL_SHIFT)) + | (SC_PAD_28FDSOI_DSE_DV_HIGH << PADRING_DSE_SHIFT) | (SC_PAD_28FDSOI_PS_PU << PADRING_PULL_SHIFT)) static iomux_cfg_t uart0_pads[] = { SC_P_UART0_RX | MUX_PAD_CTRL(UART_PAD_CTRL), |