diff options
| author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2019-06-28 12:08:28 +0200 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2019-06-28 15:51:06 +0200 |
| commit | d4290e4de744975fc1f0f1e3462737d0c12c960c (patch) | |
| tree | 131734b066496f5eb89cd02a7cda22401cd53cee | |
| parent | bd5c644ad5ba88642c6036ba986ca294c239ed88 (diff) | |
apalis-imx8/colibri-imx8qxp: implement poc sku handling
Implement proof of concept 1 GB resp. 2 GB vs. 2 GB resp. 4 GB DDR SKU
handling based on fuses indicating SoC being i.MX 8QP resp. 8DX vs. 8QM
resp. 8QXP. This overrides the newly introduced weak
board_mem_get_layout() function.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
| -rw-r--r-- | board/toradex/apalis-imx8/apalis-imx8.c | 24 | ||||
| -rw-r--r-- | board/toradex/colibri-imx8qxp/colibri-imx8qxp.c | 24 |
2 files changed, 48 insertions, 0 deletions
diff --git a/board/toradex/apalis-imx8/apalis-imx8.c b/board/toradex/apalis-imx8/apalis-imx8.c index c8fc90d348..378edfa12c 100644 --- a/board/toradex/apalis-imx8/apalis-imx8.c +++ b/board/toradex/apalis-imx8/apalis-imx8.c @@ -100,6 +100,30 @@ static void board_gpio_init(void) } #endif +void board_mem_get_layout(uint64_t *phys_sdram_1_start, + uint64_t *phys_sdram_1_size, + uint64_t *phys_sdram_2_start, + uint64_t *phys_sdram_2_size) +{ + sc_ipc_t ipc = gd->arch.ipc_channel_handle; + uint32_t is_quadplus = 0, val = 0; + sc_err_t sciErr = sc_misc_otp_fuse_read(ipc, 6, &val); + + if (sciErr == SC_ERR_NONE) { + /* QP has one A72 core disabled */ + is_quadplus = (val >> 5) & 0x1; + } + + *phys_sdram_1_start = PHYS_SDRAM_1; + *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; + *phys_sdram_2_start = PHYS_SDRAM_2; + if (is_quadplus) + /* Our QP based SKUs only have 2 GB RAM (PHYS_SDRAM_1_SIZE) */ + *phys_sdram_2_size = 0x0UL; + else + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; +} + int checkboard(void) { puts("Board: Apalis iMX8\n"); diff --git a/board/toradex/colibri-imx8qxp/colibri-imx8qxp.c b/board/toradex/colibri-imx8qxp/colibri-imx8qxp.c index b28065a7f2..9208ae7c7a 100644 --- a/board/toradex/colibri-imx8qxp/colibri-imx8qxp.c +++ b/board/toradex/colibri-imx8qxp/colibri-imx8qxp.c @@ -131,6 +131,30 @@ static iomux_cfg_t usdhc1_sd[] = { SC_P_USDHC1_VSELECT | MUX_PAD_CTRL(ESDHC_PAD_CTRL), }; +void board_mem_get_layout(uint64_t *phys_sdram_1_start, + uint64_t *phys_sdram_1_size, + uint64_t *phys_sdram_2_start, + uint64_t *phys_sdram_2_size) +{ + sc_ipc_t ipc = gd->arch.ipc_channel_handle; + uint32_t is_dualx = 0, val = 0; + sc_err_t sciErr = sc_misc_otp_fuse_read(ipc, 6, &val); + + if (sciErr == SC_ERR_NONE) { + /* DX has two A35 cores disabled */ + is_dualx = (val >> 2) & 0x2; + } + + *phys_sdram_1_start = PHYS_SDRAM_1; + if (is_dualx) + /* Our DX based SKUs only have 1 GB RAM */ + *phys_sdram_1_size = SZ_1G; + else + *phys_sdram_1_size = PHYS_SDRAM_1_SIZE; + *phys_sdram_2_start = PHYS_SDRAM_2; + *phys_sdram_2_size = PHYS_SDRAM_2_SIZE; +} + int board_mmc_init(bd_t *bis) { int i, ret; |