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authorNitin Yadav <n-yadav@ti.com>2024-04-18 14:00:57 -0500
committerAndrejs Cainikovs <andrejs.cainikovs@toradex.com>2024-05-02 11:47:14 +0200
commitcaeb8641a8e4be140ce29c14eb8471c0a1766f7a (patch)
treedeac665527c0cb09a193531c10a08e3d4b00e8e8
parent7a123f7b3c98b71adbd10239a7f436362609d043 (diff)
mmc: am654_sdhci: Fix OTAP/ITAP delay values
U-Boot is failing to boot class U1 UHS SD cards due to incorrect OTAP and ITAP delay select values. Update OTAP and ITAP delay select values from DT. Upstream-Status: Backport [5048b5c61afddddb0a6ff2e6bffdd9dd028e399b] Fixes: c7d106b4eb3 ("mmc: am654_sdhci: Update output tap delay writes") Signed-off-by: Nitin Yadav <n-yadav@ti.com> Signed-off-by: Judith Mendez <jm@ti.com> Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@toradex.com>
-rw-r--r--drivers/mmc/am654_sdhci.c25
1 files changed, 17 insertions, 8 deletions
diff --git a/drivers/mmc/am654_sdhci.c b/drivers/mmc/am654_sdhci.c
index 8ec3285337..40105502ca 100644
--- a/drivers/mmc/am654_sdhci.c
+++ b/drivers/mmc/am654_sdhci.c
@@ -513,14 +513,23 @@ static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
{
struct udevice *dev = host->mmc->dev;
struct am654_sdhci_plat *plat = dev_get_plat(dev);
- u32 otap_del_sel, itap_del_sel, mask, val;
-
- otap_del_sel = plat->otap_del_sel[host->mmc->selected_mode];
- itap_del_sel = plat->itap_del_sel[host->mmc->selected_mode];
- mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK | ITAPDLYSEL_MASK |
- ITAPDLYENA_MASK;
- val = (1 << OTAPDLYENA_SHIFT) | (otap_del_sel << OTAPDLYSEL_SHIFT) |
- (1 << ITAPDLYENA_SHIFT) | (itap_del_sel << ITAPDLYSEL_SHIFT);
+ int mode = host->mmc->selected_mode;
+ u32 otap_del_sel;
+ u32 itap_del_sel;
+ u32 mask, val;
+
+ otap_del_sel = plat->otap_del_sel[mode];
+
+ mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
+ val = (1 << OTAPDLYENA_SHIFT) |
+ (otap_del_sel << OTAPDLYSEL_SHIFT);
+
+ itap_del_sel = plat->itap_del_sel[mode];
+
+ mask |= ITAPDLYENA_MASK | ITAPDLYSEL_MASK;
+ val |= (1 << ITAPDLYENA_SHIFT) |
+ (itap_del_sel << ITAPDLYSEL_SHIFT);
+
regmap_update_bits(plat->base, PHY_CTRL4, ITAPCHGWIN_MASK,
1 << ITAPCHGWIN_SHIFT);
regmap_update_bits(plat->base, PHY_CTRL4, mask, val);