board: apalis/colibri_imx6: check for and report ecc errors in fuses

The PMIC on apalis/colibri_imx6 may have ECC errors in fuses that will
prevent correct settings. Up to one bit error per fuse bank can be
reported and corrected by the ECC logic. Two bit errors can only be
reported.

Signed-off-by: Gerard Salvatella <gerard.salvatella@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>

1 files changed, 50 insertions, 0 deletions

diff --git a/board/toradex/apalis_imx6/pf0100.c b/board/toradex/apalis_imx6/pf0100.c
index 0a1fb70635..6a4cb4ebca 100644
--- a/board/toradex/apalis_imx6/pf0100.c
+++ b/board/toradex/apalis_imx6/pf0100.c
@@ -22,6 +22,8 @@
 /* define for PMIC register dump */
 /*#define DEBUG */
 
+#define WARNBAR		"@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@@\n"
+
 /* use Apalis GPIO1 to switch on VPGM, ON: 1 */
 static iomux_v3_cfg_t const pmic_prog_pads[] = {
 	MX6_PAD_NANDF_D4__GPIO2_IO04 | MUX_PAD_CTRL(NO_PAD_CTRL),
@@ -40,6 +42,54 @@ unsigned pmic_init(void)
 		puts("i2c bus failed\n");
 		return 0;
 	}
+
+	/* check for errors in PMIC fuses */
+	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_INTSTAT3, 1, &val, 1) < 0) {
+		puts("i2c pmic INTSTAT3 register read failed\n");
+		return 0;
+	}
+	if (val & PFUZE100_BIT_OTP_ECCI) {
+		puts("\n"WARNBAR);
+		puts("WARNING: ecc errors found in pmic fuse banks\n");
+		puts(WARNBAR);
+	}
+	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_OTP_ECC_SE1, 1, &val, 1) < 0) {
+		puts("i2c pmic ECC_SE1 register read failed\n");
+		return 0;
+	}
+	if (val & PFUZE100_BITS_ECC_SE1) {
+		puts(WARNBAR);
+		puts("WARNING: ecc has made bit corrections in banks 1 to 5\n");
+		puts(WARNBAR);
+	}
+	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_OTP_ECC_SE2, 1, &val, 1) < 0) {
+		puts("i2c pmic ECC_SE2 register read failed\n");
+		return 0;
+	}
+	if (val & PFUZE100_BITS_ECC_SE2) {
+		puts(WARNBAR);
+		puts("WARNING: ecc has made bit corrections in banks 6 to 10\n");
+		puts(WARNBAR);
+	}
+	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_OTP_ECC_DE1, 1, &val, 1) < 0) {
+		puts("i2c pmic ECC_DE register read failed\n");
+		return 0;
+	}
+	if (val & PFUZE100_BITS_ECC_DE1) {
+		puts(WARNBAR);
+		puts("ERROR: banks 1 to 5 have uncorrectable bits\n");
+		puts(WARNBAR);
+	}
+	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_OTP_ECC_DE2, 1, &val, 1) < 0) {
+		puts("i2c pmic ECC_DE register read failed\n");
+		return 0;
+	}
+	if (val & PFUZE100_BITS_ECC_DE2) {
+		puts(WARNBAR);
+		puts("ERROR: banks 6 to 10 have uncorrectable bits\n");
+		puts(WARNBAR);
+	}
+
 	/* get device ident */
 	if (i2c_read(PFUZE100_I2C_ADDR, PFUZE100_DEVICEID, 1, &devid, 1) < 0) {
 		puts("i2c pmic devid read failed\n");