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2019-03-04colibri-vf: disable ODTColibri-iMX7_LXDE-Image_2.8b6.184-20190401Colibri-iMX6_LXDE-Image_2.8b6.184-20190401Colibri-iMX6ULL_LXDE-Image_2.8b6.184-20190401Colibri-VF_LXDE-Image_2.8b6.183-20190331Colibri-T30_LXDE-Image_2.8b6.184-20190401Colibri-T20_LXDE-Image_2.8b6.184-20190401Apalis-iMX6_LXDE-Image_2.8b6.184-20190401Apalis-TK1_LXDE-Image_2.8b6.184-20190401Apalis-TK1-Mainline_LXDE-Image_2.8b6.184-20190401Apalis-T30_LXDE-Image_2.8b6.184-20190401Stefan Agner
Disable ODT entirly, it seems to work more stable accross a variety of modules. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-12-20apalis-tk1: remove default vesa vga mode from vidargsColibri-iMX7_LXDE-Image_2.8b5.156-20181228Colibri-iMX6_LXDE-Image_2.8b5.156-20181228Colibri-iMX6ULL_LXDE-Image_2.8b5.156-20181228Colibri-VF_LXDE-Image_2.8b5.156-20181228Colibri-T30_LXDE-Image_2.8b5.156-20181228Colibri-T20_LXDE-Image_2.8b5.156-20181228Apalis-iMX6_LXDE-Image_2.8b5.156-20181228Apalis-TK1_LXDE-Image_2.8b5.156-20181228Apalis-TK1-Mainline_LXDE-Image_2.8b5.156-20181228Apalis-T30_LXDE-Image_2.8b5.156-20181228Marcel Ziswiler
Remove video=tegrafb0:640x480-16@60 aka VESA VGA mode from vidargs in order for the panel specification in the device tree to be used. This causes the default to be the 10.1" LVDS display which will be available in the Toradex webshop shortly. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-12-20colibri_imx7_emmc: fix kernel freeze if M4 started from U-BootMarcel Ziswiler
Commit 2196085dc58e ("colibri_imx7_emmc: add configuration for tezi") also enabled FDT relocation, however, this is causing the Linux kernel to freeze if the M4 firmware was previously started from within U-Boot. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-12-20colibri_imx7: fix kernel freeze if M4 started from U-BootMarcel Ziswiler
Commit 66200a6d2d ("colibri_imx7: add configuration for tezi") also enabled FDT relocation, however, this is causing the Linux kernel to freeze if the M4 firmware was previously started from within U-Boot. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-12-20mx6: toradex: apalis_imx6: increase phy autonegotiation timeoutMarcel Ziswiler
Increasing PHY_ANEG_TIMEOUT from the default 4000 to 10000. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Philippe Schenker <philippe.schenker@toradex.com>
2018-12-20phy: ksz9031: Center FLP timing at 16msPhilippe Schenker
This patch centers the timing around 16ms instead of 8ms as it is in reset. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-12-20board: imx6ull: Add disable PMIC_STBY_REQPhilippe Schenker
Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the SOC to request for a lower voltage during sleep. This is necessary because the voltage is changing too slow for the SOC to wake up properly. Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-11-27colibri_imx7: explicitly set flash detection pin as inputStefan Agner
If the SoC is fused with eMMC reset enabled, the detection GPIO is still set as an output. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-11-27colibri_imx7: fix comments about memory alignment requirementsStefan Agner
Linux seems to require memory to be aligned by 2MiB to properly use it as lowmem. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-09-28toradex boards: sdboot cosmetic clean-upColibri-iMX7_LXDE-Image_2.8b4.129-20181005Colibri-iMX6_LXDE-Image_2.8b4.129-20181005Colibri-iMX6ULL_LXDE-Image_2.8b4.129-20181005Colibri-VF_LXDE-Image_2.8b4.129-20181005Colibri-T30_LXDE-Image_2.8b4.129-20181005Colibri-T20_LXDE-Image_2.8b4.129-20181005Apalis-iMX6_LXDE-Image_2.8b4.129-20181005Apalis-TK1_LXDE-Image_2.8b4.129-20181005Apalis-TK1-Mainline_LXDE-Image_2.8b4.129-20181005Apalis-T30_LXDE-Image_2.8b4.129-20181005Marcel Ziswiler
The whole thing meanwhile diverged heavily. Fix this. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Philippe Schenker <philippe.schenker@toradex.com>
2018-09-28colibri_t20: fix sdbootMarcel Ziswiler
Currently, the Colibri T20 sdboot variable tries to load the kernel from the second MMC/SD device instance. However, given the Colibri T20 having on-module NAND flash the MMC/SD card is actually the primary instance. Fix this to load the kernel and device tree from the first (typically FAT) partition of the MMC/SD card as customary on all Toradex modules. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Philippe Schenker <philippe.schenker@toradex.com>
2018-09-28Revert "apalis-tk1: change usb_port_owner_info to 3 in defargs"Dominik Sliwa
This reverts commit cb4e847cbfe791a4093b0dec7b7467df4406f845. We had some issues with USB2.0 devices when using OTG, reverting for now. Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-09-28colibri-imx6ull: fix ethernet phy power onMarcel Ziswiler
Just give the new Ethernet PHY power save mode circuitry time to settle. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-09-28colibri imx6: use dynamic ddr calibrationMax Krummenacher
Some Colibri iMX6 IT were found which were freezing at higher temperature. Using the SPL to do a dynamic calibration at each boot fixes the issue. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-09-27mx6: ddr: use consistent debug outputMax Krummenacher
Print all ddr calibration output in the same style. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-09-20ARM: mx6: ddr: use Kconfig for inclusion of DDR calibration routinesEric Nelson
The DDR calibration routines are gated by conditionals for the i.MX6DQ SOCs, but with the use of the sysinfo parameter, these are usable on at least i.MX6SDL and i.MX6SL variants with DDR3. Also, since only the Novena board currently uses the dynamic DDR calibration routines, these routines waste space on other boards using SPL. Add a KConfig entry to allow boards to selectively include the DDR calibration routines. Signed-off-by: Eric Nelson <eric@nelint.com> (cherry picked from commit a425bf72816abbc3996540e42c33a386e8b8a221)
2018-09-20mx6: ddr: add routine to return DDR calibration dataEric Nelson
Add routine mmdc_read_calibration() to return the output of DDR calibration. This can be used for debugging or to aid in construction of static memory configuration. This routine will be used in a subsequent patch set adding a virtual "mx6memcal" board, but could also be useful when gathering statistics during an initial production run. Signed-off-by: Eric Nelson <eric@nelint.com> (cherry picked from commit 48c7d4379bcf70ce331e441b135cfbf3546dd574)
2018-09-20mx6: ddr: pass mx6_ddr_sysinfo to calibration routinesEric Nelson
The DDR calibration routines have scattered support for bus widths other than 64-bits: -- The mmdc_do_write_level_calibration() routine assumes the presence of PHY1, and -- The mmdc_do_dqs_calibration() routine tries to determine whether one or two DDR PHYs are active by reading MDCTL. Since a caller of these routines must have a valid struct mx6_ddr_sysinfo for use in calling mx6_dram_cfg(), and the bus width is available in the "dsize" field, use this structure to inform the calibration routines which PHYs are active. This allows the use of the DDR calibration routines on CPU variants like i.MX6SL that only have a single MMDC port. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Marek Vasut <marex@denx.de> (cherry picked from commit 7f17fb7400ff091dd48f86977655c6a57d06b17c)
2018-09-20mx6: ddr: allow 32 cycles for DQS gating calibrationEric Nelson
The DDR calibration code is only setting flag DG_CMP_CYC (DQS gating sample cycle) for the first PHY. Set the 32-cycle flag for both PHYs and clear when done so the MPDGCTRL0 output value isn't polluted with calibration artifacts. Signed-off-by: Eric Nelson <eric@nelint.com> Reviewed-by: Marek Vasut <marex@denx.de> (cherry picked from commit b33f74ead4dfd1ec0b500dc3d1cfef0e308b45c3)
2018-09-20colibri_imx6: apply nreset_out only if no power-onStefan Bigler
Fix the nreset_out() and only pull-down nRESET_OUT reset case was not a power-on reset. Cannot use get_imx_reset_cause() because static variable reset_cause is not initialized, normal done by get_reset_cause() much later. Signed-off-by: Stefan Bigler <stefan.bigler@securiton.ch> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-09-20mtd: nand: colibri_t20: more comments/debug outputMarcel Ziswiler
Add more comments resp. debug output concerning block size and ECC requirements of NAND flashes. This in aiding further investigation/ integration of support for future NAND flash parts. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-09-13imx: imx-common: do not zero out outside of regionsStefan Agner
There are two issues with the zeroing out code currently: The cache flush does not take the zeroed out section into account! The M4 firmware is started right after copying the firmware, and might use the memory area. Since the M4 and the A7 (where U-Boot is running) are not cache coherent, flushing cache could overwrite the M4's variable at any point in time, leading to crashes of the M4 firmware... Secondly, the program header of a Cortex-M4 firmware might look like this: LOAD off 0x00007240 vaddr 0x20000240 paddr 0x1fffdcdc align 2**12 filesz 0x000001d0 memsz 0x000055c4 flags rw- The code uses paddr as base, and zeros out everything which is beyond file size. This might overlap into the next section! It seems that memsz is in vaddr space and not paddr... Since zeroing out is not strictly necessary (the firmwares C initialization code should do that anyway) better play safe and don't initialize the empty bytes... Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-09-13colibri_vf: Fix sdboot in vf modulesGerard Salvatella
Currently Vybrids sdboot variable tries to load the kernel from /boot of the root partition (typically second partition when using the sdcard image). However, since we moved to flash the kernel in a separate UBI volume, we no longer deploy the kernel/device tree to /boot, hence sdboot does not work in its current state. Load the kernel and device tree from the first (typically FAT) partition as customary on all Toradex modules. Signed-off-by: Gerard Salvatella <gerard.salvatella@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-09-13board: toradex: turn off lcd backlight before OS handoverGerard Salvatella
U-Boot typically tears down the display controller before handing control over to Linux. On LCD displays disabling pixel clock leads to a fading out effect with vertical/horizontal lines. Make sure to disable back light before booting Linux. Signed-off-by: Gerard Salvatella <gerard.salvatella@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-09-13common: add board specific hook for os pre-boot configGerard Salvatella
Some boards require specific configuration prior to booting the kernel. For instance, our boards require shutting down the display to avoid fading transitions before the drivers are reloaded by the kernel. This can be facilitated by adding an extra hook during the os booting process. Signed-off-by: Gerard Salvatella <gerard.salvatella@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-09-13board: apalis/colibri_imx6: check for and report ecc errors in fusesGerard Salvatella
The PMIC on apalis/colibri_imx6 may have ECC errors in fuses that will prevent correct settings. Up to one bit error per fuse bank can be reported and corrected by the ECC logic. Two bit errors can only be reported. Signed-off-by: Gerard Salvatella <gerard.salvatella@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-27apalis-tk1: remove non-esential power rails on bootDominik Sliwa
When mainline kernels reboot TK1 they use SW_RESET, that reset mode does not reset PMIC. Some rails need to be off for RAM Re-repair to work correctly. Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-27apalis/colibri_imx6/imx6ull: make sure loadaddr does not collideStefan Agner
Currently $loadaddr and $fdt_addr_r point to the same address. This might be not ideal for some distro boot scripts which make use of $loadaddr after loading the device tree. Make sure the two variables point to two different addresses. Moving $loadaddr is not entirly trivial since it is defined in mx6_common.h. Move $fdt_addr_r and $ramdisk_addr_r by 1MiB, which should be enough for scripts. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-27apalis_t30: integrate tezi recoveryMarcel Ziswiler
In case of Tezi recovery do not stop regular auto booting but rather load the tezi.itb which got put at a fixed offset of 1M from the regular loadaddr. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-27apalis_t30: add configuration for teziMarcel Ziswiler
Modify configuration for Tezi: - Use distroboot by default - Boot from external SD cards by default - Disable USB PID from config block (otherwise recovery mode download in U-Boot stage fails) Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-27apalis-tk1: integrate tezi recoveryMarcel Ziswiler
In case of Tezi recovery do not stop regular auto booting but rather load the tezi.itb which got put at a fixed offset of 1M from the regular loadaddr. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-27apalis-tk1: add configuration for teziMarcel Ziswiler
Modify configuration for Tezi: - Use distroboot by default - Boot from external SD cards by default - Disable USB PID from config block (otherwise recovery mode download in U-Boot stage fails) Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-27colibri-imx6ull: add configuration for teziStefan Agner
Modify configuration for Tezi: - Enable SDP in U-Boot - Enable FDT relocation (in-place is causing issues with FIT images) - Use distroboot by default - Boot from external SD cards by default - Disable USB PID from config block (otherwise recovery mode download in U-Boot stage fails) Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-27colibri_imx7: add configuration for tezi recoveryStefan Agner
Modify configuration for Tezi unified recovery mode: - Enable SDP in U-Boot - Enable FDT relocation (in-place is causing issues with FIT images) - Remove video output - Currently only for recovery (no flash/eMMC support) Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-27colibri_imx7_emmc: add configuration for teziStefan Agner
Modify configuration for Tezi: - Enable SDP in U-Boot - Enable FDT relocation (in-place is causing issues with FIT images) - Remove video output - Boot from external SD cards using distroboot first by default - Disable USB PID from config block (otherwise recovery mode download in U-Boot stage fails) Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-27colibri_imx7: add configuration for teziStefan Agner
Modify configuration for Tezi: - Enable SDP in U-Boot - Enable FDT relocation (in-place is causing issues with FIT images) - Remove video output - Boot from external SD cards using distroboot first by default - Disable USB PID from config block (otherwise recovery mode download in U-Boot stage fails) Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-27mtest: disable physical memory cell test for teziStefan Agner
For faster test time shorten the alternative memory test to only do the stuck address/data line tests instead of full memory write pattern tests. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-27colibri_imx6: add configuration for teziStefan Agner
Modify configuration for Tezi: - Enable SDP in SPL and U-Boot - Enable FDT relocation (in-place is causing issues with FIT images) - Remove video output - Use distroboot by default - Boot from external SD cards by default - Disable USB PID from config block (otherwise recovery mode download in U-Boot stage fails) Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-27apalis_imx6: add configuration for teziStefan Agner
Modify configuration for Tezi: - Enable SDP in SPL and U-Boot - Enable FDT relocation (in-place is causing issues with FIT images) - Remove video output - Use distroboot by default - Boot from external SD cards by default - Disable USB PID from config block (otherwise recovery mode download in U-Boot stage fails) Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-07-27toradex: add easy installer configurabilityMarcel Ziswiler
Allow setting Toradex Easy Installer aka Tezi specific configuration options like not enabling SATA, directly continuing with the SDP command upon recovery, distrobooting otherwise or not storing the environment. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-07-27colibri_imx7_emmc: legacy update from external sd cardStefan Eichenberger
Use the external SD interface for legacy SD update instead of eMMC. Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-19apalis-tk1: apalis_t30: colibri_t30: display reset reasonColibri-iMX7_LXDE-Image_2.8b3.111-20180627Colibri-iMX6_LXDE-Image_2.8b3.111-20180627Colibri-iMX6ULL_LXDE-Image_2.8b3.111-20180627Colibri-VF_LXDE-Image_2.8b3.111-20180626Colibri-T30_LXDE-Image_2.8b3.111-20180627Colibri-T20_LXDE-Image_2.8b3.111-20180626Apalis-iMX6_LXDE-Image_2.8b3.111-20180626Apalis-TK1_LXDE-Image_2.8b3.111-20180626Apalis-TK1-Mainline_LXDE-Image_2.8b3.111-20180627Apalis-T30_LXDE-Image_2.8b3.111-20180626Dominik Sliwa
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-19apalis-tk1: invoking ram_repair before powerup_cpus()Dominik Sliwa
Invoking tegra124_ram_repair() before powerup_cpus() is being invoked to avoid race-conditions if arises further. (based on downstream: fe1c9e4d523d6727afb62f03ef9fa5c0f04e7859) Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-19colibri-imx6ull: set module variant depending on config blockStefan Agner
Using CPU temperature grading as a discriminator if the Wi-Fi / Bluetooth chip is populated is no longer possible due to upcoming SKUs. Set variant to -wifi only if a valid config block is present and the product id mentions a SKU with Wi-Fi / Bluetooth. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-19tdx-cfg-block: simplify i.MX 6 module detectionStefan Agner
Use CONFIG_TARGET_... at compile time to differentiate between Apalis iMX6, Colibri iMX6 and Colibri iMX6ULL. Avoid code duplication by moving question about Wi-Fi / Bluetooth before IT/non-IT decision. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-18tdx-cfg-block: add support for new Colibri iMX6ULL SKUsGerard Salvatella
Signed-off-by: Gerard Salvatella <gerard.salvatella@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-18colibri_imx7_emmc: add fatwrite supportGerard Salvatella
Tested on Colibri iMX7 1GB aka eMMC V1.1A Signed-off-by: Gerard Salvatella <gerard.salvatella@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-18colibri-vf: use leveling evaluated by DDR validation toolsStefan Agner
The DDR validation tool (which is part of Processor Expert) allows to evaluate leveling parameters for CR105/CR106/CR110. Several runs have been made with Colibri VF50 and VF61 and it seems to evaluate very similar values. Use this values by default. Note: The newly evaluated parameters seem to require CTLUPD_AREF to be enabled! Note 2: The tool also evaluated 6 as a new value for PHY02/18 GATE_CFG (Coarse adjust of gate open time). However, this seems not to work in practise. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-18colibri-vf: adjust timing according to data sheetStefan Agner
Using the DDR Validation tool in Processor Expert uncovered two timing inconsistencies. Since those timings are related to the suspend mode they do not affect or change regular memory behavior. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-06-06ARM: vf610: ddrmc: do not write CR79 by defaultStefan Agner
The current value CTLUPD_AREF(0) is the reset value of the register, so there is no need to write a value. If needed, the register can be written using board specific CR settings. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
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