From 4b833f0981c6739c5ef9e4554b330b20d011b97f Mon Sep 17 00:00:00 2001 From: Igor Opaniuk Date: Wed, 17 Jun 2020 01:26:39 +0300 Subject: imx: mx7: fix DDRC size in A7-M4 mapping table According to i.MX 7Solo Applications Processor Reference Manual, 2.1.3 Cortex-M4 Memory Map, M4 can address only 1536MB of DDRC (Start Address: 8000_0000; End Address: DFFF_FFFF). Correct DDRC size to 60000000. Relates-to: ELB-2806 Signed-off-by: Igor Opaniuk --- arch/arm/mach-imx/mx7/soc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index c140b02c3c..2350d51d3c 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -215,7 +215,7 @@ const struct rproc_att hostmap[] = { { 0x00940000, 0x00940000, 0x20000 }, /* OCRAM_PXP */ { 0x20240000, 0x00940000, 0x20000 }, /* OCRAM_PXP */ { 0x10000000, 0x80000000, 0x0fff0000 }, /* DDR Code alias */ - { 0x80000000, 0x80000000, 0xe0000000 }, /* DDRC */ + { 0x80000000, 0x80000000, 0x60000000 }, /* DDRC */ { /* sentinel */ } }; #endif -- cgit v1.2.3