From b9f2af3352244b2a966eb57491d3c9f54ccaa234 Mon Sep 17 00:00:00 2001 From: Marcel Ziswiler Date: Tue, 26 Nov 2019 10:58:55 +0100 Subject: imx8mm-evk, imx8mm-val: take changed sd/mmc spl boot order into account Signed-off-by: Marcel Ziswiler --- board/freescale/imx8mm_evk/spl.c | 22 +++++++++++----------- board/freescale/imx8mm_val/spl.c | 22 +++++++++++----------- 2 files changed, 22 insertions(+), 22 deletions(-) diff --git a/board/freescale/imx8mm_evk/spl.c b/board/freescale/imx8mm_evk/spl.c index 8ceea9c36b..10e2493318 100644 --- a/board/freescale/imx8mm_evk/spl.c +++ b/board/freescale/imx8mm_evk/spl.c @@ -86,8 +86,8 @@ static iomux_v3_cfg_t const usdhc2_dat3_pad = static struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC2_BASE_ADDR, 0, 1}, - {USDHC3_BASE_ADDR, 0, 1}, + {USDHC3_BASE_ADDR, 0, 8}, + {USDHC2_BASE_ADDR, 0, 4}, }; int board_mmc_init(bd_t *bis) @@ -96,13 +96,18 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: * (U-Boot device node) (Physical Port) - * mmc0 USDHC1 - * mmc1 USDHC2 + * mmc0 USDHC2 (SD card) + * mmc1 USDHC1 (eMMC) */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { case 0: - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); imx_iomux_v3_setup_multiple_pads( usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset"); @@ -110,11 +115,6 @@ int board_mmc_init(bd_t *bis) udelay(500); gpio_direction_output(USDHC2_PWR_GPIO, 1); break; - case 1: - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - break; default: printf("Warning: you configured more USDHC controllers" "(%d) than supported by the board\n", i + 1); @@ -136,7 +136,7 @@ int board_mmc_getcd(struct mmc *mmc) switch (cfg->esdhc_base) { case USDHC3_BASE_ADDR: - ret = 1; + ret = 1; /* eMMC */ break; case USDHC2_BASE_ADDR: imx_iomux_v3_setup_pad(usdhc2_cd_pad); diff --git a/board/freescale/imx8mm_val/spl.c b/board/freescale/imx8mm_val/spl.c index 0d30c826aa..21c5b7a2f9 100644 --- a/board/freescale/imx8mm_val/spl.c +++ b/board/freescale/imx8mm_val/spl.c @@ -87,8 +87,8 @@ static iomux_v3_cfg_t const usdhc2_dat3_pad = static struct fsl_esdhc_cfg usdhc_cfg[2] = { - {USDHC2_BASE_ADDR, 0, 1}, - {USDHC3_BASE_ADDR, 0, 1}, + {USDHC3_BASE_ADDR, 0, 8}, + {USDHC2_BASE_ADDR, 0, 4}, }; int board_mmc_init(bd_t *bis) @@ -97,13 +97,18 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: * (U-Boot device node) (Physical Port) - * mmc0 USDHC1 - * mmc1 USDHC2 + * mmc0 USDHC2 (SD card) + * mmc1 USDHC1 (eMMC) */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { case 0: - usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); + imx_iomux_v3_setup_multiple_pads( + usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); + break; + case 1: + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC2_CLK); imx_iomux_v3_setup_multiple_pads( usdhc2_pads, ARRAY_SIZE(usdhc2_pads)); gpio_request(USDHC2_PWR_GPIO, "usdhc2_reset"); @@ -111,11 +116,6 @@ int board_mmc_init(bd_t *bis) udelay(500); gpio_direction_output(USDHC2_PWR_GPIO, 1); break; - case 1: - usdhc_cfg[1].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); - imx_iomux_v3_setup_multiple_pads( - usdhc3_pads, ARRAY_SIZE(usdhc3_pads)); - break; default: printf("Warning: you configured more USDHC controllers" "(%d) than supported by the board\n", i + 1); @@ -137,7 +137,7 @@ int board_mmc_getcd(struct mmc *mmc) switch (cfg->esdhc_base) { case USDHC3_BASE_ADDR: - ret = 1; + ret = 1; /* eMMC */ break; case USDHC2_BASE_ADDR: imx_iomux_v3_setup_pad(usdhc2_cd_pad); -- cgit v1.2.3