From f2275625b0f776d23026036487916be7dc704579 Mon Sep 17 00:00:00 2001 From: Stefan Agner Date: Fri, 14 Dec 2018 15:26:00 +0100 Subject: ARM: vf610: ddrmc: program Dummy DDRBYTE1/2 The Vybrid reference manual VFXXXRM Rev. 0 10/2016 states in chapter 5.2.6.1 DUMMY PADS (DDR/QuadSPI) that those pads need to be programed for correct operation of DDR. Assume the default DDR pin configuration which seems to work well on a Colibri VF50. Signed-off-by: Stefan Agner (cherry picked from commit a95d444055134fd8f0e1f2bd4c11222170fe6dc5) --- arch/arm/imx-common/ddrmc-vf610.c | 2 ++ arch/arm/include/asm/arch-vf610/iomux-vf610.h | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/imx-common/ddrmc-vf610.c b/arch/arm/imx-common/ddrmc-vf610.c index 2a1d373785..13ee7a7fc6 100644 --- a/arch/arm/imx-common/ddrmc-vf610.c +++ b/arch/arm/imx-common/ddrmc-vf610.c @@ -62,6 +62,8 @@ void ddrmc_setup_iomux(const iomux_v3_cfg_t *pads, int pads_count) VF610_PAD_DDR_WE__DDR_WE_B, VF610_PAD_DDR_ODT1__DDR_ODT_0, VF610_PAD_DDR_ODT0__DDR_ODT_1, + VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1, + VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2, VF610_PAD_DDR_RESETB, }; diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h index fe546998c6..6801976eb4 100644 --- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h +++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h @@ -250,6 +250,8 @@ enum { VF610_PAD_DDR_WE__DDR_WE_B = IOMUX_PAD(0x02d0, 0x02d0, 0, __NA_, 0, VF610_DDR_PAD_CTRL), VF610_PAD_DDR_ODT1__DDR_ODT_0 = IOMUX_PAD(0x02d4, 0x02d4, 0, __NA_, 0, VF610_DDR_PAD_CTRL), VF610_PAD_DDR_ODT0__DDR_ODT_1 = IOMUX_PAD(0x02d8, 0x02d8, 0, __NA_, 0, VF610_DDR_PAD_CTRL), + VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1 = IOMUX_PAD(0x02dc, 0x02dc, 0, __NA_, 0, VF610_DDR_PAD_CTRL), + VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2 = IOMUX_PAD(0x02e0, 0x02e0, 0, __NA_, 0, VF610_DDR_PAD_CTRL), }; #endif /* __IOMUX_VF610_H__ */ -- cgit v1.2.3