diff options
author | Max Krummenacher <max.krummenacher@toradex.com> | 2021-02-13 18:09:58 +0100 |
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committer | Max Krummenacher <max.krummenacher@toradex.com> | 2021-02-17 12:40:47 +0100 |
commit | 46f929ecdfe5c7d1d1e5b8c58ba8acc293d99dc5 (patch) | |
tree | 03197b30376f0194f39050d877fb8b7bd43d5b1c /overlays/verdin-imx8mm_sn65dsi84_overlay.dts | |
parent | 5a72227897da72d2a5ba4f176b35c9a3703d90c7 (diff) |
verdin-imx8mm: move most properties in disabled nodes
Move all non conflicting properties into nodes of the main device tree and
just set the status to okay for those nodes.
Split the touch controller from the lvds controller's overlay into its own.
This unifies with the way it is done for the Verdin iMX8M Plus.
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Diffstat (limited to 'overlays/verdin-imx8mm_sn65dsi84_overlay.dts')
-rw-r--r-- | overlays/verdin-imx8mm_sn65dsi84_overlay.dts | 86 |
1 files changed, 10 insertions, 76 deletions
diff --git a/overlays/verdin-imx8mm_sn65dsi84_overlay.dts b/overlays/verdin-imx8mm_sn65dsi84_overlay.dts index 0471224..0b68405 100644 --- a/overlays/verdin-imx8mm_sn65dsi84_overlay.dts +++ b/overlays/verdin-imx8mm_sn65dsi84_overlay.dts @@ -11,22 +11,11 @@ compatible = "toradex,verdin-imx8mm"; }; -&{/} { - backlight { - compatible = "pwm-backlight"; - brightness-levels = <0 45 63 88 119 158 203 255>; - default-brightness-level = <4>; - /* Verdin MEZ_DSI_1_BKL_EN (SODIMM 21) */ - enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mez_dsi_1_bkl_en>; - power-supply = <®_3p3v>; - /* Verdin MEZ_PWM_3_DSI (SODIMM 19) */ - pwms = <&pwm1 0 6666667 PWM_POLARITY_INVERTED>; - }; +&backlight { + status = "okay"; }; -&{/soc@0/bus@32c00000/display-subsystem} { +&gpu { status = "okay"; }; @@ -38,69 +27,18 @@ status = "okay"; }; -/* Verdin I2C_1 */ -&i2c4 { - #address-cells = <1>; - #size-cells = <0>; +&lcdif { status = "okay"; +}; - bridge@2c { - compatible = "ti,sn65dsi83"; - /* Verdin MEZ_GPIO_1 (SODIMM 206) */ - enable-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mez_gpio1>; - reg = <0x2c>; - ti,dsi-lanes = <4>; - ti,height-mm = <136>; - ti,lvds-bpp = <24>; - ti,lvds-format = <2>; - ti,width-mm = <217>; - - display-timings { - native-mode = <&lvds_timing0>; - - lvds_timing0: lt170410_2whc { - /* - * Take the minimum pixelclock as 71.1 MHz is - * not working on NXP i.MX8M Mini - */ - clock-frequency = <68900000>; - hactive = <1280 1280 1280>; - hfront-porch = <23 60 71>; - hback-porch = <23 60 71>; - hsync-len = <15 40 47>; - vactive = <800 800 800>; - vfront-porch = <5 7 10>; - vback-porch = <5 7 10>; - vsync-len = <6 9 12>; - de-active = <1>; - pixelclk-active = <0>; - }; - }; +&lvds_ti_sn65dsi83 { + status = "okay"; - port { - dsi85_in: endpoint { - remote-endpoint = <&mipi_dsi_bridge1_out>; - }; + port { + dsi85_in: endpoint { + remote-endpoint = <&mipi_dsi_bridge1_out>; }; }; - - touch@4a { - compatible = "atmel,maxtouch"; - /* Verdin MEZ_DSI_1_INT# (SODIMM 17) */ - interrupt-parent = <&gpio3>; - interrupts = <15 IRQ_TYPE_EDGE_FALLING>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_mez_dsi_1_int_n>, <&pinctrl_mez_gpio2>; - reg = <0x4a>; - /* Verdin MEZ_GPIO_2 (SODIMM 208) */ - reset-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>; - }; -}; - -&lcdif { - status = "okay"; }; &mipi_dsi { @@ -117,7 +55,3 @@ }; }; }; - -&gpu { - status = "okay"; -}; |