1 files changed, 58 insertions, 0 deletions
diff --git a/overlays/verdin-am62_hmp_overlay.dts b/overlays/verdin-am62_hmp_overlay.dts
new file mode 100644
index 0000000..ab3584e
--- /dev/null
+++ b/overlays/verdin-am62_hmp_overlay.dts
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * Copyright 2024 Toradex
+ */
+
+// Arm Cortex-M4F processor core (MCU_M4FSS)
+
+/dts-v1/;
+/plugin/;
+
+/ {
+	compatible = "toradex,verdin-am62";
+};
+
+&{/} {
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+                rtos_ipc_memory_region: ipc-memories@9c800000 {
+                        compatible = "shared-dma-pool";
+                        reg = <0x00 0x9c800000 0x00 0x00300000>;
+                        no-map;
+                };
+
+		mcu_m4fss_dma_memory_region: m4f-dma-memory@9cb00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x00 0x9cb00000 0x00 0x100000>;
+			no-map;
+		};
+
+		mcu_m4fss_memory_region: m4f-memory@9cc00000 {
+			compatible = "shared-dma-pool";
+			reg = <0x00 0x9cc00000 0x00 0xe00000>;
+			no-map;
+		};
+	};
+};
+
+&mailbox0_cluster0 {
+	status = "okay";
+
+	mbox_m4_0: mbox-m4-0 {
+		ti,mbox-rx = <0 0 0>;
+		ti,mbox-tx = <1 0 0>;
+	};
+};
+
+&mcu_m4fss {
+       mboxes = <&mailbox0_cluster0 &mbox_m4_0>;
+       memory-region = <&mcu_m4fss_dma_memory_region>,
+                       <&mcu_m4fss_memory_region>;
+};
+
+&mcu_uart0 {
+        status = "reserved";
+};