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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2025 Toradex
*
* Capacitive Touch Display 7" DSI.
*
* https://www.toradex.com/accessories/capacitive-touch-display-7-inch-dsi
*/
/dts-v1/;
/plugin/;
#include <dt-bindings/clock/fsl,imx95-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "display-rvt70hslnwca0_overlay.dtsi"
/ {
compatible = "toradex,verdin-imx95";
};
&{/} {
backlight_verdin_dsi: backlight-verdin-dsi {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s_2_d_out_gpio>;
brightness-levels = <0 45 63 88 119 158 203 255>;
default-brightness-level = <4>;
/* Verdin I2S_2_D_OUT (SODIMM 46) */
enable-gpios = <&gpio5 4 GPIO_ACTIVE_HIGH>;
/* Verdin PWM_3_DSI (SODIMM 19) */
pwms = <&tpm6 2 6666667 0>;
};
};
&display_pixel_link {
status = "okay";
};
&displaymix_irqsteer {
status = "okay";
};
&dpu {
assigned-clocks = <&scmi_clk IMX95_CLK_DISP1PIX>,
<&scmi_clk IMX95_CLK_VIDEOPLL1_VCO>,
<&scmi_clk IMX95_CLK_VIDEOPLL1>;
assigned-clock-parents = <&scmi_clk IMX95_CLK_VIDEOPLL1>;
assigned-clock-rates = <0>, <3360000000>, <420000000>;
status = "okay";
};
/* Verdin I2C_2_DSI */
&lpi2c3 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
bridge@2c {
compatible = "ti,sn65dsi83";
reg = <0x2c>;
/* Verdin GPIO_10_DSI (DSI_1_BKL_EN, SODIMM 21) */
enable-gpios = <&som_gpio_expander 3 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
dsi_lvds_bridge_in: endpoint {
data-lanes = <1 2>;
remote-endpoint = <&dsi0_out>;
};
};
port@2 {
reg = <2>;
dsi_lvds_bridge_out: endpoint {
remote-endpoint = <&panel_rvt70hslnwac0_in>;
};
};
};
};
touch@41 {
compatible = "ilitek,ili2132";
reg = <0x41>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2s_2_bclk_gpio>;
/* Verdin GPIO_9_DSI (DSI_1_INT#, SODIMM 17) */
interrupt-parent = <&som_gpio_expander>;
interrupts = <2 IRQ_TYPE_EDGE_RISING>;
/* Verdin I2S_2_BCLK (SODIMM 42) */
reset-gpios = <&gpio5 6 GPIO_ACTIVE_LOW>;
};
};
&mipi_dsi {
status = "okay";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
dsi0_out: endpoint {
remote-endpoint = <&dsi_lvds_bridge_in>;
};
};
};
};
&panel_rvt70hslnwac0 {
backlight = <&backlight_verdin_dsi>;
panel-timing {
clock-frequency = <60000000>;
};
port {
panel_rvt70hslnwac0_in: endpoint {
remote-endpoint = <&dsi_lvds_bridge_out>;
};
};
};
&pixel_interleaver {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
channel@0 {
reg = <0>;
status = "okay";
};
};
/* Verdin PWM_3_DSI */
&tpm6 {
status = "okay";
};
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