diff options
author | Dominik Sliwa <dominik.sliwa@toradex.com> | 2016-06-28 09:51:29 +0200 |
---|---|---|
committer | Dominik Sliwa <dominik.sliwa@toradex.com> | 2017-01-25 14:12:56 +0100 |
commit | 23a27e51577ded4d070794b864585829c69cdc56 (patch) | |
tree | 058f5e4f20307f26bf4d7d811047d4c90a25522e /board | |
parent | fd34401c2149cca64cb314952ae4995123e463cb (diff) |
Apalis_TK1_K20: SPI Communication, ADC, TSC, GPIO
Support for Communication between TK1 SoC and K20 MCU
This patch includes ADC, TSC and GPIO functionality.
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Diffstat (limited to 'board')
-rw-r--r-- | board/board.c | 5 | ||||
-rw-r--r-- | board/board.h | 13 | ||||
-rw-r--r-- | board/clock_config.c | 56 | ||||
-rw-r--r-- | board/clock_config.h | 2 | ||||
-rw-r--r-- | board/pin_mux.c | 128 | ||||
-rw-r--r-- | board/usb_host_config.h | 204 |
6 files changed, 359 insertions, 49 deletions
diff --git a/board/board.c b/board/board.c index c0bbde0..726870b 100644 --- a/board/board.c +++ b/board/board.c @@ -32,11 +32,14 @@ #include <stdint.h> #include "board.h" +#include "fsl_debug_console.h" /*! * @brief initialize debug console to enable printf for this demo/example */ void BOARD_InitDebugConsole(void) { - /* The user initialization should be placed here */ + uint32_t uartClkSrcFreq = BOARD_DEBUG_UART_CLK_FREQ; + + DbgConsole_Init(BOARD_DEBUG_UART_BASEADDR, BOARD_DEBUG_UART_BAUDRATE, BOARD_DEBUG_UART_TYPE, uartClkSrcFreq); } diff --git a/board/board.h b/board/board.h index bd6d36b..00d185d 100644 --- a/board/board.h +++ b/board/board.h @@ -40,6 +40,19 @@ /* The board name */ #define BOARD_NAME "###-not-specified-###" +#define BOARD_USE_UART +#define BOARD_DEBUG_UART_TYPE DEBUG_CONSOLE_DEVICE_TYPE_UART +#define BOARD_DEBUG_UART_BASEADDR (uint32_t) UART3 +#define BOARD_DEBUG_UART_CLKSRC kCLOCK_BusClk +#define BOARD_DEBUG_UART_CLK_FREQ CLOCK_GetBusClkFreq() +#define BOARD_UART_IRQ UART3_RX_TX_IRQn +#define BOARD_UART_IRQ_HANDLER UART3_RX_TX_IRQHandler + +#define BOARD_USES_ADC + +#ifndef BOARD_DEBUG_UART_BAUDRATE +#define BOARD_DEBUG_UART_BAUDRATE 115200 +#endif /******************************************************************************* * API diff --git a/board/clock_config.c b/board/clock_config.c index 41f6eb5..16626ba 100644 --- a/board/clock_config.c +++ b/board/clock_config.c @@ -30,6 +30,11 @@ /* This is a template for clock configuration created by New Kinetis SDK 2.x Project Wizard. Enjoy! */ +#include "fsl_device_registers.h" +#include "fsl_common.h" +#include "fsl_clock.h" +#include "fsl_port.h" +#include "clock_config.h" /******************************************************************************* * Definitions @@ -43,10 +48,51 @@ * Code ******************************************************************************/ -/*! - * @brief configure clock after reset for this demo/example - */ -void BOARD_BootClockRUN(void) { - /* The user configuration should be placed here */ +void BOARD_InitOsc0(void) +{ + const osc_config_t oscConfig = {.freq = BOARD_XTAL0_CLK_HZ, + .capLoad = 0, + .workMode = kOSC_ModeOscLowPower, + .oscerConfig = { + .enableMode = kOSC_ErClkEnable, +#if (defined(FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER) && FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER) + .erclkDiv = 0U, +#endif + }}; + + CLOCK_InitOsc0(&oscConfig); + + /* Passing the XTAL0 frequency to clock driver. */ + CLOCK_SetXtal0Freq(BOARD_XTAL0_CLK_HZ); + /* Use RTC_CLKIN input clock directly. */ + //CLOCK_SetXtal32Freq(BOARD_XTAL32K_CLK_HZ); +} + +void BOARD_BootClockRUN(void) +{ + /* + * Core clock: 96MHz + * Bus clock: 48MHz + */ + mcg_pll_config_t pll0Config = { + .enableMode = 0U, .prdiv = 0x3U, .vdiv = 0x18U, + }; + const sim_clock_config_t simConfig = { + .pllFllSel = 1U, /* PLLFLLSEL select PLL. */ + .er32kSrc = 2U, /* ERCLK32K selection, use RTC. */ + .clkdiv1 = 0x01130000U, /* SIM_CLKDIV1. */ + }; + + CLOCK_SetSimSafeDivs(); + BOARD_InitOsc0(); + + CLOCK_CalcPllDiv(BOARD_XTAL0_CLK_HZ, 96000000U, &pll0Config.prdiv, &pll0Config.vdiv); + CLOCK_BootToPeeMode(kMCG_OscselOsc, kMCG_PllClkSelPll0, &pll0Config); + + CLOCK_SetInternalRefClkConfig(kMCG_IrclkEnable, kMCG_IrcSlow, 0); + CLOCK_SetSimConfig(&simConfig); + + SystemCoreClock = 96000000U; } + diff --git a/board/clock_config.h b/board/clock_config.h index e39811f..f9c2406 100644 --- a/board/clock_config.h +++ b/board/clock_config.h @@ -36,7 +36,7 @@ /******************************************************************************* * DEFINITION ******************************************************************************/ - +#define BOARD_XTAL0_CLK_HZ 8000000U /******************************************************************************* * API ******************************************************************************/ diff --git a/board/pin_mux.c b/board/pin_mux.c index be07825..3a538f5 100644 --- a/board/pin_mux.c +++ b/board/pin_mux.c @@ -34,6 +34,8 @@ #include "fsl_common.h" #include "fsl_port.h" #include "fsl_gpio.h" +#include "fsl_debug_console.h" +#include "gpio_ext.h" /******************************************************************************* * Code @@ -43,54 +45,96 @@ */ void BOARD_InitPins(void) { - gpio_pin_config_t gpio_out_config = { - kGPIO_DigitalOutput, 0, - }; + unsigned int i; + gpio_pin_config_t gpio_out_config = { + kGPIO_DigitalOutput, 0, + }; + gpio_pin_config_t gpio_out_hi_config = { + kGPIO_DigitalOutput, 1, + }; + gpio_pin_config_t gpio_in_config = { + kGPIO_DigitalInput, + }; + port_pin_config_t od_config; - CLOCK_EnableClock(kCLOCK_PortA); - CLOCK_EnableClock(kCLOCK_PortB); - CLOCK_EnableClock(kCLOCK_PortC); - CLOCK_EnableClock(kCLOCK_PortD); - CLOCK_EnableClock(kCLOCK_PortE); + CLOCK_EnableClock(kCLOCK_PortA); + CLOCK_EnableClock(kCLOCK_PortB); + CLOCK_EnableClock(kCLOCK_PortC); + CLOCK_EnableClock(kCLOCK_PortD); + CLOCK_EnableClock(kCLOCK_PortE); - /* Osc pins */ - PORT_SetPinMux(PORTA, 18UL, kPORT_PinDisabledOrAnalog); - PORT_SetPinMux(PORTA, 19UL, kPORT_PinDisabledOrAnalog); + /* Osc pins */ + PORT_SetPinMux(PORTA, 18UL, kPORT_PinDisabledOrAnalog); + PORT_SetPinMux(PORTA, 19UL, kPORT_PinDisabledOrAnalog); - /* CAN0 pinmux config */ - PORT_SetPinMux(PORTA, 12u, kPORT_MuxAlt2); /* CAN0 TX */ - PORT_SetPinMux(PORTA, 13u, kPORT_MuxAlt2); /* CAN0 RX */ + /* CAN0 pinmux config */ + PORT_SetPinMux(PORTA, 12u, kPORT_MuxAlt2); /* CAN0 TX */ + PORT_SetPinMux(PORTA, 13u, kPORT_MuxAlt2); /* CAN0 RX */ - /* CAN1 pinmux config */ - PORT_SetPinMux(PORTC, 17u, kPORT_MuxAlt2); /* CAN1 TX */ - PORT_SetPinMux(PORTC, 16u, kPORT_MuxAlt2); /* CAN1 RX */ + /* CAN1 pinmux config */ + PORT_SetPinMux(PORTC, 17u, kPORT_MuxAlt2); /* CAN1 TX */ + PORT_SetPinMux(PORTC, 16u, kPORT_MuxAlt2); /* CAN1 RX */ - /* Debug UART3 pinmux config */ - PORT_SetPinMux(PORTB, 11u, kPORT_MuxAlt3); /* UART3 TX */ - PORT_SetPinMux(PORTB, 10u, kPORT_MuxAlt3); /* UART3 RX */ +#ifdef SDK_DEBUGCONSOLE + /* Debug UART3 pinmux config */ + PORT_SetPinMux(PORTB, 11u, kPORT_MuxAlt3); /* UART3 TX */ + PORT_SetPinMux(PORTB, 10u, kPORT_MuxAlt3); /* UART3 RX */ +#endif - /* Resistive Touch panel pinmux config */ - PORT_SetPinMux(PORTE, 6u, kPORT_MuxAsGpio); - GPIO_PinInit(GPIOE, 6u, &gpio_out_config); - GPIO_SetPinsOutput(GPIOE, 1u << 6); /* Force X+*/ - PORT_SetPinMux(PORTB, 9u, kPORT_MuxAsGpio); - GPIO_PinInit(GPIOB, 9u, &gpio_out_config); - GPIO_ClearPinsOutput(GPIOB, 1u << 9); /* Force X-*/ - PORT_SetPinMux(PORTC, 5u, kPORT_MuxAsGpio); - GPIO_PinInit(GPIOC, 5u, &gpio_out_config); - GPIO_SetPinsOutput(GPIOC, 1u << 5); /* Force Y+*/ - PORT_SetPinMux(PORTC, 13u, kPORT_MuxAsGpio); - GPIO_PinInit(GPIOC, 13u, &gpio_out_config); - GPIO_ClearPinsOutput(GPIOC, 1u << 13); /* Force Y-*/ - PORT_SetPinMux(PORTB, 6UL, kPORT_PinDisabledOrAnalog); /* Sense X+ */ - PORT_SetPinMux(PORTB, 7UL, kPORT_PinDisabledOrAnalog); /* Sense X- */ - PORT_SetPinMux(PORTC, 8UL, kPORT_PinDisabledOrAnalog); /* Sense Y+ */ - PORT_SetPinMux(PORTC, 9UL, kPORT_PinDisabledOrAnalog); /* Sense Y- */ +#ifdef BOARD_USES_ADC + /* Resistive Touch panel pinmux config */ + PORT_SetPinMux(PORTE, 6u, kPORT_MuxAsGpio); + GPIO_PinInit(GPIOE, 6u, &gpio_out_hi_config); /* Force X+*/ + PORT_SetPinMux(PORTB, 9u, kPORT_MuxAsGpio); + GPIO_PinInit(GPIOB, 9u, &gpio_out_config); /* Force X-*/ + PORT_SetPinMux(PORTC, 5u, kPORT_MuxAsGpio); + GPIO_PinInit(GPIOC, 5u, &gpio_out_hi_config); /* Force Y+*/ + PORT_SetPinMux(PORTC, 13u, kPORT_MuxAsGpio); + GPIO_PinInit(GPIOC, 13u, &gpio_out_config); /* Force Y-*/ + PORT_SetPinMux(PORTB, 6UL, kPORT_PinDisabledOrAnalog); /* Sense X+ */ + GPIO_PinInit(GPIOB, 6u, &gpio_in_config); + PORT_SetPinMux(PORTB, 7UL, kPORT_PinDisabledOrAnalog); /* Sense X- */ + GPIO_PinInit(GPIOB, 7u, &gpio_in_config); + PORT_SetPinMux(PORTC, 8UL, kPORT_PinDisabledOrAnalog); /* Sense Y+ */ + GPIO_PinInit(GPIOC, 8u, &gpio_in_config); + PORT_SetPinMux(PORTC, 9UL, kPORT_PinDisabledOrAnalog); /* Sense Y- */ + GPIO_PinInit(GPIOC, 9u, &gpio_in_config); - /* SPI2 pinmux config */ - PORT_SetPinMux(PORTB, 21u, kPORT_MuxAlt2); /* SPI2_SCK */ - PORT_SetPinMux(PORTB, 22u, kPORT_MuxAlt2); /* SPI2_SOUT */ - PORT_SetPinMux(PORTB, 23u, kPORT_MuxAlt2); /* SPI2_SIN */ - PORT_SetPinMux(PORTB, 20u, kPORT_MuxAsGpio); /* SPI2_SS */ + /* Apalis ADC pinmux config */ + PORT_SetPinMux(PORTB, 0UL, kPORT_PinDisabledOrAnalog); /* ADC0 */ + PORT_SetPinMux(PORTB, 1UL, kPORT_PinDisabledOrAnalog); /* ADC1 */ + PORT_SetPinMux(PORTB, 2UL, kPORT_PinDisabledOrAnalog); /* ADC2 */ + PORT_SetPinMux(PORTB, 3UL, kPORT_PinDisabledOrAnalog); /* ADC3 */ +#endif + /* SPI2 pinmux config */ + PORT_SetPinMux(PORTB, 21u, kPORT_MuxAlt2); /* SPI2_SCK */ + PORT_SetPinMux(PORTB, 22u, kPORT_MuxAlt2); /* SPI2_SOUT */ + PORT_SetPinMux(PORTB, 23u, kPORT_MuxAlt2); /* SPI2_SIN */ + PORT_SetPinMux(PORTB, 20u, kPORT_MuxAlt2); /* SPI2_SS */ + + /* Open Drain INT pins config */ + od_config.mux = kPORT_MuxAsGpio; + od_config.openDrainEnable = kPORT_OpenDrainEnable; + od_config.pullSelect = kPORT_PullDisable; + od_config.slewRate = kPORT_FastSlewRate; + od_config.passiveFilterEnable = kPORT_PassiveFilterDisable; + od_config.driveStrength = kPORT_LowDriveStrength; + od_config.lockRegister = kPORT_UnlockRegister; + GPIO_PinInit(GPIOA, 16u, &gpio_out_hi_config); + PORT_SetPinConfig(PORTA, 16u, &od_config); /* MCU_INT1 */ + GPIO_PinInit(GPIOA, 29u, &gpio_out_hi_config); + PORT_SetPinConfig(PORTA, 29u, &od_config); /* MCU_INT2 */ + GPIO_PinInit(GPIOB, 8u, &gpio_out_config); + PORT_SetPinConfig(PORTB, 8u, &od_config); /* MCU_INT3 */ + GPIO_PinInit(GPIOE, 26u, &gpio_out_config); + PORT_SetPinConfig(PORTE, 26u, &od_config); /* MCU_INT4 */ + GPIO_PinInit(GPIOC, 19u, &gpio_out_hi_config); + PORT_SetPinConfig(PORTC, 19u, &od_config); /* PMIC_ONKEY */ + + /* GPIOs */ + for (i = 0; i < sizeof(gpio_list)/sizeof(struct gpio_id); i++){ + PORT_SetPinMux(gpio_list[i].port, gpio_list[i].pin, kPORT_MuxAsGpio); + GPIO_PinInit(gpio_list[i].gpio, gpio_list[i].pin, &gpio_in_config); + } } diff --git a/board/usb_host_config.h b/board/usb_host_config.h new file mode 100644 index 0000000..0bde321 --- /dev/null +++ b/board/usb_host_config.h @@ -0,0 +1,204 @@ +/* + * Copyright (c) 2015 - 2016, Freescale Semiconductor, Inc. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * o Redistributions of source code must retain the above copyright notice, this list + * of conditions and the following disclaimer. + * + * o Redistributions in binary form must reproduce the above copyright notice, this + * list of conditions and the following disclaimer in the documentation and/or + * other materials provided with the distribution. + * + * o Neither the name of Freescale Semiconductor, Inc. nor the names of its + * contributors may be used to endorse or promote products derived from this + * software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR + * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON + * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _USB_HOST_CONFIG_H_ +#define _USB_HOST_CONFIG_H_ + +/* Host Controller Enable */ +/*! + * @brief host khci instance count, meantime it indicates khci enable or disable. + * - if 0, host khci driver is disable. + * - if greater than 0, host khci driver is enable. + */ +#define USB_HOST_CONFIG_KHCI (1U) + +/*! + * @brief host ehci instance count, meantime it indicates ehci enable or disable. + * - if 0, host ehci driver is disable. + * - if greater than 0, host ehci driver is enable. + */ +#define USB_HOST_CONFIG_EHCI (0U) + +/* Common configuration macros for all controllers */ + +/*! + * @brief host driver instance max count. + * for example: 2 - one for khci, one for ehci. + */ +#define USB_HOST_CONFIG_MAX_HOST (2U) + +/*! + * @brief host pipe max count. + * pipe is the host driver resource for device endpoint, one endpoint need one pipe. + */ +#define USB_HOST_CONFIG_MAX_PIPES (16U) + +/*! + * @brief host transfer max count. + * transfer is the host driver resource for data transmission mission, one transmission mission need one transfer. + */ +#define USB_HOST_CONFIG_MAX_TRANSFERS (16U) + +/*! + * @brief the max endpoint for one interface. + * the max endpoint descriptor number that one interface descriptor contain. + */ +#define USB_HOST_CONFIG_INTERFACE_MAX_EP (4U) + +/*! + * @brief the max interface for one configuration. + * the max interface descriptor number that one configuration descriptor can contain. + */ +#define USB_HOST_CONFIG_CONFIGURATION_MAX_INTERFACE (5U) + +/*! + * @brief the max power for one device. + * the max power the host can provide for one device. + */ +#define USB_HOST_CONFIG_MAX_POWER (250U) + +/*! + * @brief the max retries for enumeration. + * retry time when enumeration fail. + */ +#define USB_HOST_CONFIG_ENUMERATION_MAX_RETRIES (3U) + +/*! + * @brief the max retries for enumeration setup stall. + * the max times for one transfer can stall. + */ +#define USB_HOST_CONFIG_ENUMERATION_MAX_STALL_RETRIES (1U) + +/*! + * @brief the max NAK count for one transaction. + * when nak count reach to the value, the transaction fail. + */ +#define USB_HOST_CONFIG_MAX_NAK (3000U) + +/*! @brief Whether the transfer buffer is cache-enabled or not. */ +#define USB_HOST_CONFIG_BUFFER_PROPERTY_CACHEABLE (0U) + +/*! @brief if 1, enable usb compliance test codes; if 0, disable usb compliance test codes. */ +#define USB_HOST_CONFIG_COMPLIANCE_TEST (0U) + +/*! @brief if 1, class driver clear stall automatically; if 0, class driver don't clear stall. */ +#define USB_HOST_CONFIG_CLASS_AUTO_CLEAR_STALL (0U) + +/* KHCI configuration */ +#if ((defined USB_HOST_CONFIG_KHCI) && (USB_HOST_CONFIG_KHCI)) + +/*! + * @brief khci dma align fix buffer size. + */ +#define USB_HOST_CONFIG_KHCI_DMA_ALIGN_BUFFER (64U) + +#endif + +/* EHCI configuration */ +#if ((defined USB_HOST_CONFIG_EHCI) && (USB_HOST_CONFIG_EHCI)) + +/*! + * @brief ehci periodic frame list size. + * the value can be 1024, 512, 256, 128, 64, 32, 16 or 8. + */ +#define USB_HOST_CONFIG_EHCI_FRAME_LIST_SIZE (1024U) + +/*! + * @brief ehci QH max count. + */ +#define USB_HOST_CONFIG_EHCI_MAX_QH (8U) + +/*! + * @brief ehci QTD max count. + */ +#define USB_HOST_CONFIG_EHCI_MAX_QTD (8U) + +/*! + * @brief ehci ITD max count. + */ +#define USB_HOST_CONFIG_EHCI_MAX_ITD (0U) + +/*! + * @brief ehci SITD max count. + */ +#define USB_HOST_CONFIG_EHCI_MAX_SITD (0U) + +#endif + +/*! + * @brief host HUB class instance count, meantime it indicates HUB class enable or disable. + * - if 0, host HUB class driver is disable. + * - if greater than 0, host HUB class driver is enable. + */ +#define USB_HOST_CONFIG_HUB (0U) + +/*! + * @brief host HID class instance count, meantime it indicates HID class enable or disable. + * - if 0, host HID class driver is disable. + * - if greater than 0, host HID class driver is enable. + */ +#define USB_HOST_CONFIG_HID (0U) + +/*! + * @brief host MSD class instance count, meantime it indicates MSD class enable or disable. + * - if 0, host MSD class driver is disable. + * - if greater than 0, host MSD class driver is enable. + */ +#define USB_HOST_CONFIG_MSD (0U) + +/*! + * @brief host CDC class instance count, meantime it indicates CDC class enable or disable. + * - if 0, host CDC class driver is disable. + * - if greater than 0, host CDC class driver is enable. + */ +#define USB_HOST_CONFIG_CDC (0U) + +/*! + * @brief host AUDIO class instance count, meantime it indicates AUDIO class enable or disable. + * - if 0, host AUDIO class driver is disable. + * - if greater than 0, host AUDIO class driver is enable. + */ +#define USB_HOST_CONFIG_AUDIO (0U) + +/*! + * @brief host PHDC class instance count, meantime it indicates PHDC class enable or disable. + * - if 0, host PHDC class driver is disable. + * - if greater than 0, host PHDC class driver is enable. + */ +#define USB_HOST_CONFIG_PHDC (0U) + +/*! + * @brief host printer class instance count, meantime it indicates printer class enable or disable. + * - if 0, host printer class driver is disable. + * - if greater than 0, host printer class driver is enable. + */ +#define USB_HOST_CONFIG_PRINTER (0U) + +#endif /* _USB_HOST_CONFIG_H_ */ |