ksd:ksdk update to 2.2

This include FreeRTOS update to version 9.0.0

Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>

1 files changed, 19 insertions, 14 deletions

diff --git a/drivers/fsl_cmt.c b/drivers/fsl_cmt.c
index 43b2d3c..8cf72bc 100644
--- a/drivers/fsl_cmt.c
+++ b/drivers/fsl_cmt.c
@@ -1,6 +1,6 @@
 /*
- * Copyright (c) 2015, Freescale Semiconductor, Inc.
- * All rights reserved.
+ * Copyright (c) 2016, Freescale Semiconductor, Inc.
+ * Copyright 2016-2017 NXP
  *
  * Redistribution and use in source and binary forms, with or without modification,
  * are permitted provided that the following conditions are met:
@@ -12,7 +12,7 @@
  *   list of conditions and the following disclaimer in the documentation and/or
  *   other materials provided with the distribution.
  *
- * o Neither the name of Freescale Semiconductor, Inc. nor the names of its
+ * o Neither the name of the copyright holder nor the names of its
  *   contributors may be used to endorse or promote products derived from this
  *   software without specific prior written permission.
  *
@@ -46,8 +46,6 @@
 #define CMT_CMTDIV_FOUR (4)
 /* CMT diver 8. */
 #define CMT_CMTDIV_EIGHT (8)
-/* CMT mode bit mask. */
-#define CMT_MODE_BIT_MASK (CMT_MSC_MCGEN_MASK | CMT_MSC_FSK_MASK | CMT_MSC_BASE_MASK)
 
 /*******************************************************************************
  * Prototypes
@@ -64,8 +62,10 @@ static uint32_t CMT_GetInstance(CMT_Type *base);
  * Variables
  ******************************************************************************/
 
+#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
 /*! @brief Pointers to cmt clocks for each instance. */
 static const clock_ip_name_t s_cmtClock[FSL_FEATURE_SOC_CMT_COUNT] = CMT_CLOCKS;
+#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
 
 /*! @brief Pointers to cmt bases for each instance. */
 static CMT_Type *const s_cmtBases[] = CMT_BASE_PTRS;
@@ -82,7 +82,7 @@ static uint32_t CMT_GetInstance(CMT_Type *base)
     uint32_t instance;
 
     /* Find the instance index from base address mappings. */
-    for (instance = 0; instance < FSL_FEATURE_SOC_CMT_COUNT; instance++)
+    for (instance = 0; instance < ARRAY_SIZE(s_cmtBases); instance++)
     {
         if (s_cmtBases[instance] == base)
         {
@@ -90,7 +90,7 @@ static uint32_t CMT_GetInstance(CMT_Type *base)
         }
     }
 
-    assert(instance < FSL_FEATURE_SOC_CMT_COUNT);
+    assert(instance < ARRAY_SIZE(s_cmtBases));
 
     return instance;
 }
@@ -113,8 +113,10 @@ void CMT_Init(CMT_Type *base, const cmt_config_t *config, uint32_t busClock_Hz)
 
     uint8_t divider;
 
+#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
     /* Ungate clock. */
     CLOCK_EnableClock(s_cmtClock[CMT_GetInstance(base)]);
+#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
 
     /* Sets clock divider. The divider set in pps should be set
        to make sycClock_Hz/divder = 8MHz */
@@ -144,15 +146,17 @@ void CMT_Deinit(CMT_Type *base)
     CMT_DisableInterrupts(base, kCMT_EndOfCycleInterruptEnable);
     DisableIRQ(s_cmtIrqs[CMT_GetInstance(base)]);
 
+#if !(defined(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL) && FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL)
     /* Gate the clock. */
     CLOCK_DisableClock(s_cmtClock[CMT_GetInstance(base)]);
+#endif /* FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL */
 }
 
 void CMT_SetMode(CMT_Type *base, cmt_mode_t mode, cmt_modulate_config_t *modulateConfig)
 {
-    uint8_t mscReg;
+    uint8_t mscReg = base->MSC;
 
-    /* Set the mode. */
+    /* Judge the mode. */
     if (mode != kCMT_DirectIROCtl)
     {
         assert(modulateConfig);
@@ -166,13 +170,14 @@ void CMT_SetMode(CMT_Type *base, cmt_mode_t mode, cmt_modulate_config_t *modulat
 
         /* Set carrier modulator. */
         CMT_SetModulateMarkSpace(base, modulateConfig->markCount, modulateConfig->spaceCount);
+        mscReg &= ~ (CMT_MSC_FSK_MASK | CMT_MSC_BASE_MASK);
+        mscReg |= mode;
+    }
+    else
+    {
+        mscReg &= ~CMT_MSC_MCGEN_MASK;
     }
-
     /* Set the CMT mode. */
-    mscReg = base->MSC;
-    mscReg &= ~CMT_MODE_BIT_MASK;
-    mscReg |= mode;
-
     base->MSC = mscReg;
 }